AMD K5 Technical Reference Manual page 155

Table of Contents

Advertisement

18524C/0—Nov1996
Signal Descriptions
it wants. The processor has no way of breaking the hold. While
the processor is backed off, it continues to execute out of its
instruction and data caches, if possible. If it can no longer
operate out of its caches, it holds BREQ asserted continuously.
As early as one clock after BOFF is negated, the processor
restarts—from the beginning—any bus cycle that was aborted
when BOFF was asserted. This is unlike BOFF on the 486 pro-
cessor, which restarts only the transfers that did not complete
when BOFF was asserted. The processor can drive another
cycle with ADS as early as two clocks after any aborted cycle
completes. This allows one idle clock (also called a dead clock)
between any two bus cycles. If BOFF was asserted when ADS
was also asserted, however, ADS remains Low (floats asserted)
after BOFF is negated. In such a case, system logic must prop-
erly interpret the state of ADS when it negates BOFF.
If BOFF is asserted during a locked operation, only the cycle(s)
aborted before their last BRDY and the cycles not yet run are
restarted after BOFF is negated. Thus, system logic must keep
track of all cycles in the locked operation that have completed
before the assertion of BOFF and must continue the locked
operation immediately after BOFF is negated, except that if a
writeback is pending when BOFF is negated, the writeback
takes precedence over the restarting of the aborted cycles in
the locked operation.
The processor responds to inquire cycles while BOFF is
asserted and drives HIT and HITM in response to such cycles.
During the BOFF-initiated inquire cycles, BOFF can be
negated as early as one clock after EADS is asserted. If HITM
is asserted, which would occur two clocks after EADS is
asserted, the writeback is performed after BOFF is negated. If
a processor cycle was aborted by the assertion of BOFF, that
cycle is restarted as soon as BOFF is negated, except that if an
inquire cycle hits a modified line while BOFF was asserted, the
writeback is driven first when BOFF is negated, before an
aborted cycle is restarted. Multiple inquire cycles are not per-
mitted to hit modified lines. The processor implements this
restriction by ignoring EADS while HITM is asserted; when
HITM is asserted, it is held asserted until the last BRDY of the
writeback.
AMD-K5 Processor Technical Reference Manual
5-39

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Amd-k5

Table of Contents