Jtag Signals - Intel 41210 Design Manual

Design Guide Checklist
Table 24. JTAG Signals
Signal
TCK
TDI
TDO
TMS
TRST#
64
Recommendations
If not used for JTAG, leave as No Connect
If not used for JTAG, leave as No Connect
If not used for JTAG, leave as No Connect
If not used for JTAG, leave as No Connect
Connect to ground via a 1K pulldown resistor.
Intel® 41210 Serial to Parallel PCI Bridge Design Guide
Reason/Impact
Internal pull-up
Internal pull-up
Internal pull-up
Internal pull-up
If TAP interface is not used this
should be tied to ground.