Power Plane Layout
This chapter provides details on the decoupling and voltage planes needed to bias the 41210 Bridge
package.
4.1
41210 Bridge Decoupling Guidelines
Table 2
lists the decoupling guidelines for the 41210 Bridge.
decoupling capacitors around the 41210 Bridge ball grid pins.
Figure 8. Decoupling Placement for Core and PCI Express Voltage Planes
Intel® 41210 Serial to Parallel PCI Bridge Design Guide
Figure 8
and
Figure 9
provide the
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