Detailed Memory Description - Siemens ERTEC EB 200 Manual

The D-TCM with a maximum size of 4 Kbytes can be displayed on any aligned address area. The ARM946E-S then
accesses the D-TCM under this address and not the AHB bus. In addition, the locked I-cache of 2/4/6 Kbytes can be
displayed on any aligned address area.
Only the ARM946E-S can access both address areas.
IRT accesses to the KRAM do not use the AHB bus. These accesses are implemented in the IRT switch controller.
The KRAM can be addressed starting from the memory area 0x1010_0000. An access in the non-permissible register
area is detected by an IRT-internal error signal and not by an AHB acknowledgement time-out error.
3.2

Detailed Memory Description

The table below presents a detailed description of the memory segments. Mirrored segments should not be used for
addressing to ensure compatible memory expansion at a later date.
Segment Contents
Boot ROM (0 - 8 Kbytes)
or
EMIF SDRAM (0-128
Mbytes)
or
0
EMIF memory (0-64
Mbytes)
or
Locked I-cache (2/4/6
Kbytes)
1 IRT switch
2 EMIF (SDRAM)
EMIF
3
I/O Bank 0
EMIF
I/O Bank 1
EMIF
I/O Bank 2
EMIF
I/O Bank 2
EMIF
I/O Bank 2
EMIF
I/O Bank 2
EMIF
I/O Bank 3
Not used
4 Internal boot ROM
Copyright © Siemens AG 2010. All rights reserved.
Technical data subject to change
Size Address Area
0000_0000 -
256 Mbytes
0FFF_FFFF
1000_0000 -
256 Mbytes
1FFF_FFFF
2000_0000 -
256 Mbytes
2FFF_FFFF
3000_0000 -
16 Mbytes
30FF_FFFF
3100_0000 -
16 Mbytes
31FF_FFFF
3200_0000 -
4 Mbytes
323F_FFFF
3240_0000 -
2 Mbytes
325F_FFFF
3260_0000 -
2 Mbytes
327F_FFFF
3280_0000 -
8 Mbytes
32FF_FFFF
3300_0000 -
16 Mbytes
33FF_FFFF
3400_0000 -
3FFF_FFFF
4000_0000-
8 Kbytes
4000_1FFF
24
Description
After reset:
Boot ROM (8 Kbytes, physical;
Memory swap=00b);
After memory swap:
EMIFSDRAM (128 Mbytes, physical;
Memory swap=01b);
or
EMIF memory (64 Mbytes physical;
Memory swap=10b);
From ARM9 perspective, the locked I-
cache (2/4/6 Kbytes) or a D-TCM (4
Kbytes) can be displayed.
7
2 Mbytes, physical; 2 * mirrored;
- 0-1 MBytes for IRT register
- 1-2 MBytes for KRAM
64 Mbytes are mirrored
see Table 5
see Table 5
CPLD ( register)
Ethernetcontroller SMSC91C111 register
Ethernetcontroller SMSC91C111 data buffer
external periphery and memory expansion
When a smaller device is interfaced, mirroring
over the entire 16 Mbytes
8 Kbytes, physical
EB 200 Manual
Version 1.1.4