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Hardware structure
5.2 Memory on EB 200P-3
GPIO
XHIF_SEG_0
(GPIO[52])
XHIF_SEG_1
(GPIO[53])
XHIF_RDY
(GPIO[54])
XHIF_D2 (GPIO[66])
Other
5.2
Memory on EB 200P-3
5.2.1
Memory hardware
LPSDRAM
The LPSDRAM interface connects to one memory device, the Micron MT48H16M32LFB5-6
IT:C.
• 64-Mbyte memory capacity
• 32-bit data width
• PC133 SDRAM-compatible (125 MHz is used with ERTEC 200P-3), 1.8 V signaling interface
You can find the LPSDRAM memory device under reference D1900 in the schematics diagram.
QSPI Flash memory (bootable)
You can assemble the EB 200P-3 with QuadSPI memory using one of the following two types
of devices:
• Micron: MT25QL128ABB1ESE-0AUT
• Winbond: W25Q128JVSJM
Due to signal integrity and long distances between QSPI and FPGA, the bus driver separates
the shared XHIF and QSPI signals and disables shared XHIF signals when QSPI is active. The
QSPI Flash memory is the recommended boot device on the EB 200P-3.
You can find the QSPI Flash memory device under the reference D2104 in the schematics
diagram.
QSPI
Device
pin#
1
2
3
QuadSPI signal connection
20
Connections, func
tions on the board
except XHIF - GPIO
mode
TRACEPKT14
TRACEPKT15
TRACECLK
(no special function
on the board)
Pin
Direction (Memory view)
Name
CS#
Input
DO / DQ1 Input / Output
WP / DQ2 Input / Output
Section
Connections, functions
on the board except
XHIF - GPIOX modue
11
11
11
ERTEC Signal
GPIO[32] OctalSPI_SS_N, Pull-up 10K to P3V3
GPIO[36] OctalSPI_DQ(1), Pull-up 10K to P3V3
GPIO[37] OctalSPI_DQ(2), Pull-up 10K to P3V3
Equipment Manual, 06/2023, A5E52825940-AA
Section
Evaluation Board for ERTEC 200P-3
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