Settings On The Eb 200; Default Settings Of The Emif Interface; Table 11: Default Settings Of Emif Registers On The Eb 200 - Siemens ERTEC EB 200 Manual

6

Settings on the EB 200

This section describes different register groups and the parameters of the CPLDs that are specified by default on the
EB 200.
6.1

Default Settings of the EMIF Interface

The following settings are made on the registers of the External Memory Interface. The ERTEC 200 registers are
described in document /2/.
Register
Async wait cycle config
SDRAM Bank Config
SDRAM Refresh Control
ASYNC Bank0 Config
ASYNC Bank1 Config
ASYNC Bank2 Config
ASYNC Bank3 Config
Extended Config

Table 11: Default Settings of EMIF Registers on the EB 200

Copyright © Siemens AG 2010. All rights reserved.
Technical data subject to change
Address Date
0x7000_0004 0x4000_0080
0x7000_0008 0x0000_0521
0x7000_000C 0x0000_0320
0x7000_0010 0x0462_2311
0x7000_0014 0x0462_2311
0x7000_0018 0x0462_2312
0x7000_001C 0x0462_2312
0x7000_0020 0x0303_0000
28
Comment
RDY_PER_N = 1; Max_Ext_Wait =
128 (0x80) x 16 = 2048 AHB cycles
9CAS, 13RAS, 2CAS Delay
Refresh every 8 us
16-bit, 120 ns RD&WR, 20 ns setup &hold
16-bit, 120 ns RD&WR, 20 ns setup &hold
32-bit, 120 ns RD&WR, 20 ns setup &hold
32-bit, 120 ns RD&WR, 20 ns setup &hold
Default value
EB 200 Manual
Version 1.1.4