Dell PowerEdge C6220 II Hardware Owner's Manual page 126

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Token
Setup option
0252
N/A
0254
3F8h/2F8h
0257
2F8h/3F8h
025D
Optimizer Mode Memory Operating Mode set to support Optimizer.
025E
Spare Mode
025F
Mirror Mode
Advanced ECC
0260
Mode
Coherent HT
026A
Link Speed
Coherent HT
026B
Link Speed
Active
026E
Processor Cores
Active
026F
Processor Cores
Active
0270
Processor Cores
Active
0271
Processor Cores
Active
0272
Processor Cores
126
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Using the System Setup Program
Description
The second NIC is used for PXE boot, followed by NIC1.
By default, set rear serial port address as 0x3F8 and
internal serial port address as 0x2F8.
Set rear serial port address as 0x2F8 and internal serial
port address as 0x3F8.
Memory Operating Mode set to support Sparing.
Memory Operating Mode set to support Memory
mirroring.
Memory Operating Mode set to support Advanced ECC,
i.e. Lockstep, Chipkill.
Sets to support HyperTransport 1 specification.
Sets to support HyperTransport 3 specification.
This field controls the number of enabled all of cores in
each processor. By default, the maximum number of cores
per processor will be enabled.
This field controls the number of enabled 6 cores in each
processor. By default, the maximum number of cores per
processor will be enabled.
This field controls the number of enabled 8 cores in each
processor. By default, the maximum number of cores per
processor will be enabled.
This field controls the number of enabled 10 cores in each
processor. By default, the maximum number of cores per
processor will be enabled.
This field controls the number of enabled 12 cores in each
processor. By default, the maximum number of cores per
processor will be enabled.

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