Selection Phase; Figure 1.27 Qas Phase - Fujitsu MAW3073 SERIES Specifications

The SCSI ID bit is a single bit on the DATA BUS that corresponds to the SCSI device's unique
SCSI address. All other DATA BUS bits shall be released by the SCSI device. The DB(P_CRCA)
and DB(P1) are not valid during the QAS phase. During the QAS phase, DB(P_CRCA), and
DB(P1) may be released or asserted, but shall not be actively driven false.
1.6.3

SELECTION phase

An INIT selects a TARG (a single SCSI unit) in the SELECTION phase.
Note:
I/O signal is false during a SELECTION phase. (The I/O signal identifies the phase as
SELECTION or RESELECTION).
(1) Start sequence without ARBITRATION phase
In systems with the ARBITRATION phase not implemented, the INIT starts the SELECTION
phase in the following sequence (see Figure 1.28).
1) The INIT shall wait for at least Bus Clear Delay after BUS FREE phase detection.
2) Then the INIT asserts SCSI IDs of desired TARG and INIT itself on the DATA BUS.
1-54

Figure 1.27 QAS phase

C141-C011