Fujitsu MAW3073 SERIES Specifications page 14

Figure 1.1 Example of SCSI configuration ...........................................................................................1-2
Figure 1.2 Interface signals ...................................................................................................................1-3
Figure 1.3 DATA BUS and SCSI ID ....................................................................................................1-4
Figure 1.4 SCSI interface connector (IDD side) (16-bit SCSI).............................................................1-8
Figure 1.5 SCSI interface connector (cable side) (16-bit SCSI) ...........................................................1-9
Figure 1.6 Single-ended connector pin assignment (16-bit SCSI).......................................................1-10
Figure 1.7 Low-Voltage-Differential connector pin assignment (16-bit SCSI)...................................1-11
Figure 1.8 SCA-2 type, 16-bit SCSI interface connector (IDD side) ..................................................1-12
Figure 1.9 SCA-2 Type, single-ended 16-bit SCSI connector signal assignment ...............................1-13
Figure 1.10 SCA Type, Low-Voltage-Differential connector signal assignment ..................................1-14
Figure 1.11 Connection of interface cable ............................................................................................1-16
Figure 1.12 Single-Ended SCSI termination circuit-1...........................................................................1-17
Figure 1.13 Single-Ended SCSI termination circuit-2...........................................................................1-18
Figure 1.14 LVD SCSI termination circuit ...........................................................................................1-20
Figure 1.15 Circuit for mated indications..............................................................................................1-23
Figure 1.16 16-bit SCSI (not SCA2) terminating resistor circuit ..........................................................1-24
Figure 1.17 Receiver de-skew parameters.............................................................................................1-38
Figure 1.18 Transmitter skew................................................................................................................1-40
Figure 1.19 Transmitter time asymmetry ..............................................................................................1-41
Figure 1.20 Fast-5/10 Measurement Point ............................................................................................1-42
Figure 1.21 Fast-20 Measurement Point ...............................................................................................1-43
Figure 1.22 LVD ST Data Transfer measurement point .......................................................................1-44
Figure 1.23 LVD DT Data Transfer measurement point.......................................................................1-45
Figure 1.24 LVD mode DT paced transfer easurement point................................................................1-46
Figure 1.25 BUS FREE phase...............................................................................................................1-48
Figure 1.26 ARBITRATION phase ......................................................................................................1-51
Figure 1.27 QAS phase .........................................................................................................................1-54
Figure 1.28 SELECTION phase............................................................................................................1-57
Figure 1.29 RESELECTION phase ......................................................................................................1-60
Figure 1.30 INFORMATION TRANSFER phase (phase control) .......................................................1-61
Figure 1.31 Transfer in asynchronous mode .........................................................................................1-64
Figure 1.32 ST transfer in synchronous mode.......................................................................................1-68
Figure 1.33 Data Group Pad field and pCRC field transfer ..................................................................1-74
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FIGURES
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