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Triple Timer Module
Triple Timer Module Programming Model
9.4.6.4
Timer Control (TC[3:0])—Bits 4–7
The four Timer Control (TC[3:0]) bits control the source of the timer clock, the behavior
of the TIO pin and the Timer mode of operation. Table 9-2 summarizes the functionality
of the TC bits. A detailed description of the timer operating modes is given in Timer
Modes of Operation on page 9-13. The TC[3:0] bits are cleared by hardware and
software reset. To ensure proper functionality, the TC[3:0] bits should be changed only
when the timer is disabled.
Note:
If the clock is external, the counter is incremented by transitions on the TIO
pin. The external clock is internally synchronized to the internal clock and its
frequency should be lower than the internal operating frequency divided by 4
(CLK/4).
TC3
TC2
TC1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
9-10
Freescale Semiconductor, Inc.
ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005
Table 9-2 TC[3:0] Bit Functionality
TC0
TIO
Clock
0
GPIO
Internal
1
Output
Internal
0
Output
Internal
1
Input
External
0
Input
Internal
1
Input
Internal
0
Input
Internal
1
Output
Internal
0
—
—
1
Output
Internal
0
Output
Internal
1
—
—
0
—
—
1
—
—
0
—
—
1
Output
Internal
DSP56602 User's Manual
For More Information On This Product,
Go to: www.freescale.com
Mode
Timer GPIO
Timer Pulse
Timer Toggle
Event Counter
Input Width
Input Period
Capture
Pulse Width Modulation(PWM)
(Reserved)
Watchdog Pulse
Watchdog Toggle
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Timer Pulse
MOTOROLA
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