Addressing Of Registers; Cabling; Figure 43. I/O Address Map - Hitachi ic35l060avv207-0 - Deskstar 60 GB Hard Drive Specifications

3.5 inch ultra ata/100 hard disk drive
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6.2.5 Addressing of registers

The host addresses the drive through a set of registers called the Task File. These registers are mapped
into the I/ O space of the host. Two chip select lines (CS0– and CS1–) and three address lines (DA0-02)
are used to select one of these registers, while a DIOR– or DIOW– is provided at the specified time.
The CS0– is used to address Command Block registers. while the CS1– is used to address Control Block
registers.
The following table shows the I/ O address map.
CS0–
CS1–
DA2
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
1
0
1
1
1
0
1

Figure 43. I/O address map

Note: "Addr" field is shown as an example.
During DMA operation (from writing to the command register until an interrupt) not all registers are acces-
sible. For example, the host is not supposed to read status register contents before interrupt (the value is
invalid).

6.2.6 Cabling

The maximum cable length from the host system to the drive plus circuit pattern length in the host system
shall not exceed 18 inches.
For higher data transfer application (>8.3 MB/s) a modification in the system design is recommended to
reduce cable noise and cross-talk, such as a shorter cable, bus termination, or a shielded cable.
For systems operating with Ultra DMA mode 3, 4, and 5, 80-conductor ATA cable assembly (SFF-8049)
shall be used.
DA1
DA0
DIOR– = 0 (Read)
0
0
Data Reg.
0
1
Error Reg.
1
0
Sector count Reg.
1
1
Sector number Reg.
0
0
Cylinder low Reg.
0
1
Cylinder high Reg.
1
0
Drive/Head Reg.
1
1
Status Reg.
1
0
Alt. Status Reg.
Deskstar 180GXP hard disk drive specifications
DIOW– = 0 (Write)
Command Block Registers
Data Reg.
Features Reg.
Sector count Reg.
Sector number Reg.
Cylinder low Reg.
Cylinder high Reg.
Drive/Head Reg.
Command Reg.
Control Block Registers
Device control Reg.
38

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