Signal Definitions; Table 22. Signal Definition; Table 23. Special Signal Definitions For Ultra Dma - Hitachi HTS541616J9AT00 - Travelstar 160 GB Hard Drive Specifications

2.5 inch ata/ide hard disk drive
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7.3

Signal definitions

The pin assignments of interface signals are listed as follows:
PIN
SIGNAL
01
RESET-
03
DD07
05
DD06
07
DD05
09
DD04
11
DD03
13
DD02
15
DD01
17
DD00
19
GND
21
DMARQ
23
DIOW-(*)
25
DIOR-(*)
27
IORDY(*)
29
DMACK-
31
INTRQ
33
DA01
35
DA00
37
CS0-
39
DASP-
41
+ 5V logic
43
GND

Table 22. Signal definition

O
I
I/O
OD
power
reserved
The signal lines marked with (*) are redefined during the Ultra DMA protocol to provide special functions. These
lines change from the conventional to special definitions at the moment the host decides to allow a DMA burst, if
the Ultra DMA transfer mode was previously chosen via SetFeatures. The drive becomes aware of this change upon
assertion of the DMACK- line. These lines revert back to their original definitions upon the deassertion of DMACK
at the termination of the DMA burst.
Write Operation
Read Operation

Table 23. Special signal definitions for Ultra DMA

Travelstar 5K160 (PATA) Hard Disk Drive Specification
I/O
Type
PIN
I
TTL
02
I/O
3–state
04
I/O
3–state
06
I/O
3–state
08
I/O
3–state
10
I/O
3–state
12
I/O
3–state
14
I/O
3–state
16
I/O
3–state
18
(20)
O
3–state
22
I
TTL
24
I
TTL
26
O
OD
28
I
TTL
30
O
3–state
32
I
TTL
34
I
TTL
36
I
TTL
38
I/O
OD
40
power
42
44
designates an output from the drive
designates an input to the drive
designates an input/output common
designates an Open-Drain output
designates a power supply to the drive
designates reserved pins which must be left unconnected
Special Definition
(for Ultra DMA)
DDMARDY-
HSTROBE
STOP
HDMARDY-
DSTROBE
STOP
SIGNAL
GND
DD08
DD09
DD10
DD11
DD12
DD13
DD14
DD15
Key
GND
GND
GND
CSEL
GND
(reserved)
PDIAG-
DA02
CS1-
GND
+ 5V motor
(reserved)
Conventional Definition
IORDY
DIOR-
DIOW-
DIOR-
IORDY
DIOW-
38 / 188
I/O
Type
I/O
3–state
I/O
3–state
I/O
3–state
I/O
3–state
I/O
3–state
I/O
3–state
I/O
3–state
I/O
3–state
I
TTL
I/O
OD
I
TTL
I
TTL
power

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