Deviations From Standard; Physical Interface; Registers - Hitachi HTS542516K9SA00 Specifications

9 Deviations from Standard

The device conforms to the referenced specifications, with deviations described below.
The interface conforms to the Working Document of Information Technology, AT Attachment 8 –
ATA/ATAPI Command Set (ATA/ATAPI8-ACS) Revision 3f dated 11 Dec. 2006, with deviation as
follows:
S.M.A.R.T. Return Status
Check Power Mode

10 Physical Interface

Physical Interface is described in Functional Specification part.

11 Registers

In Serial ATA, the host adapter contains a set of registers that shadow the contents of the traditional
device registers, referred to as the Shadow Register Block. Shadow Register Block registers are
interface registers used for delivering commands to the device or posting status from the device.
About details, please refer to the Serial ATA Specification.
In the following cases, the host adapter sets the BSY bit in its shadow Status Register and transmits
a FIS to the device containing the new contents.
• Command register is written in the Shadow Register Block
•
Device Control register is written in the Shadow Register Block with a change of state of the
SRST bit
• COMRESET is requested
S.M.A.R.T. RETURN STATUS subcommand does not check advisory attributes.
That is, the device will not report threshold exceeded condition unless pre-failure
attributes exceed their corresponding thresholds. For example, Power-On Hours
Attribute never results in negative reliability status.
Check Power Mode command returns FFh to Sector Count Register when the device
is in Idle mode. This command does not support 80h as the return value.
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5K250 (SATA) OEM Specification