Identification Information - Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Specification

Identification Information

The Intel
Extreme Edition 955, 965 and can be identified by the following values:
Family 1
1111b
NOTES:
1. The Family corresponds to bits [11:8] of the EDX register after RESET, bits [11:8] of the
EAX register after the CPUID instruction is executed with a 1 in the EAX register, and the
generation field of the Device ID register accessible through Boundary Scan.
2. The Model corresponds to bits [7:4] of the EDX register after RESET, bits [7:4] of the EAX
register after the CPUID instruction is executed with a 1 in the EAX register, and the model
field of the Device ID register accessible through Boundary Scan.
Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX
registers after the CPUID instruction is executed with a 2 in the EAX register. Refer to
the Intel Processor Identification and the CPUID Instruction Application Note (AP-485).
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Table 1. Intel Pentium
Extreme Edition 955, 965 Identification Information
Core
S-Spec
Stepping Size (bytes)
SL8WS B1
SL8WR B1
SL8WQ B1
SL8WP B1
SL8WM B1
SL94S B1
SL94R B1
SL94Q B1
SL94P B1
SL94N B1
SL9DA C1
14
® ®
Pentium D processor 900 sequence and Intel
Model 2
0110b
®
D Processor 900 Sequence and Intel
L2 Cache Processor
Signature
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F62h
2M x 2 0F64h
®
Processor
Speed Core/Bus
Number
920 2.80GHz/800MHz
930 3.00GHz/800MHz
940 3.20GHz/800MHz
950 3.40GHz/800MHz
Extreme
3.46GHz/1066MHz
Edition 955
920 2.80GHz/800MHz
930 3.00GHz/800MHz
940 3.20GHz/800MHz
950 3.40GHz/800MHz
Extreme
3.46GHz/1066MHz
Edition 955
915 2.80GHz/800MHz
Identification Information
® ®
Pentium processor
®
Pentium Processor
Package
775-land LGA 1, 3, 6, 7
775-land LGA 1, 3, 6, 7
775-land LGA 2, 3, 6, 7
775-land LGA 2, 3, 6, 7
775-land LGA 2, 4, 6, 7
775-land LGA
775-land LGA
775-land LGA
775-land LGA
775-land LGA 2, 4, 5, 6
775-Land LGA
Specification Update
Notes
1, 5, 6
1, 5, 6
2, 5, 6
2, 5, 6
1, 3