Acer Aspire S3-391 Service Manual page 157

Table 4-4. Component Codes
Range
0xa0-0xaf
0xb0-0xbf
0xc0-0xcf
0xd0-0xd7
0xd8-0xdf
Troubleshooting
These values are reserved for SecureCore Tiano™ platform
components.
POSTCODE_CC_PLATFORM_STAGE0 (0xa0) - Early PEI Platform
Initialization.
POSTCODE_CC_PLATFORM_STAGE1 (0xa1) -PEI Platform
Initialization.
POSTCODE_CC_PLATFORM_DXE (0xa1) - DXE Platform
Initialization.
POSTCODE_CC_PLATFORM_SMM (0xa1) - SMM Platform
Initialization.
POSTCODE_CC_PLATFORM_FLASH (0xa2) - Flash Platform
Initialization.
POSTCODE_CC_PLATFORM_CSM (0xa3) - CSM Platform
Initialization.
0xa4-0xa7 - Reserved for future expansion.
0xa8-0xaf - Reserved for use by the individual platform.
These values are reserved for future expansion.
These values are reserved for core chipset drivers (north bridge, south
bridge and CPU) and are assigned by chipset family.
POSTCODE_CC_MEMORY_CONTROLLER (0xc0) - Memory
Controller.
These values are reserved for Small Silicon drivers (SIOs, flash,
fingerprint, etc.)
POSTCODE_CC_SUPER_IO (0xd0) - Super I/O
POSTCODE_CC_FLASH_CONTROLLER (0xd1) - Flash Controller
POSTCODE_CC_FLASH_DEVICE (0xd2) - Flash Device
POSTCODE_CC_FINGERPRINT (0xd3) - Fingerprint Sensor
POSTCODE_CC_CLOCK_CONTROLLER (0xd4) - Clock Controller
POSTCODE_CC_MGMT_CONTROLLER (0xd5) - Embedded
controller or management controller.
0xd6-0xd7 - Reserved for future expansion.
Reserved for platform usage.
Description
4-27