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PCI-DIO24 User's Guide
Functional Details
When installed, the SIP establishes either a high or low logic level at each of the eight I/O lines on the port. At
each board location, A, B, and C, there are 10 holes in a line. The hole on one end is marked "HI" and is
connected to +5V. The other end is marked "LO" and is connected to GND. The eight holes in the middle
connect to eight lines of the port, A, B or C.
To pull-up lines, orient the SIP with the common pin (dot) toward the HI end; to pull-down, install the resistor
with the common pin in the LO hole.
Note:
We recommend using 2.2K SIPs (MCC part number SP-K2.29C). Use a different value only if necessary.
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