Acer 390 Series Service Manual page 122

Table 2-8 65555 Pin Functions (continued)
Ball Pin Name
B1 TD1(MCLKIN)
C2 TDO
D3 TRST#
Note: TMS, TCLK, TDI, TDO and TRST#, are powered by BVCC and GND.
Miscellaneous
E4 STNDBT#
C3 REFCLK(MCLKIN)
V1 GPIO0(ACTI)
T4 GPIO1(32KHz)
D6 N/C
C5 N/C
A12 N/C
K19 N/C
Y20 Reserved
D8 Reserved
D17 Reserved
A4 Reserved
B5 Reserved
D4 Reserved
U16 Reserved
C20 Reserved
E17 Reserved
Note: STANDBY#, RCLK, GPIO0, and GPIO1 are powered by DVCC and GND.
2-76
Type Active
In High Test data input for boundary scan. Can be
configured to be used as an input for an externally
provided MCLK through a strapping option and
register programming. See the descriptions for
registers XR70 and XRCF for complete details
In High Test data out for boundary scan.
In High Test reset for boundary scan.
In Low Standby Control Pin. Pull this pin low to place the
chip in Standby Mode. A low to high transition on
the pin will cause change to exit standby mode,
host standby mode. and panel off mode.
In High Reference Clock Input. This pin serves as the input
for an external reference oscillator (usually
14.31818 MHz). All timings of the 65555 are
derived from this primary clock input source. Can
be configured to be used as an input for an
externally provided MCLK through a strapping
option and register programming. For normal
operation. TDI should be used as the input for an
externally provided MCLK
I/O High General Purpose l/O pin, or ACTI (Activity
Indicator).
I/O High General Purpose l/O pin, or 32KHz input: clock
input for refresh of non-self-refresh DRAMs and
panel power sequencing
n/a n/a These pins should be left open.
n/a n/a
n/a n/a
n/a n/a
n/a n/a These pins are reserved for future use, and should
n/a n/a not be connected.
n/a n/a
n/a n/a
n/a n/a
n/a n/a
n/a n/a
n/a n/a
n/a n/a
Description
Service Guide