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Acer 390 Series Service Manual Page 81

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The chip provides two extra IRQ lines and one programmable chip select for motherboard
Plug-and-Play functions. The interrupt lines can be routed to any of the available ISA interrupts.
The on-chip IDE controller supports two separate IDE connectors for up to four IDE devices
providing an interface for IDE hard disks and CD ROMs. The Ultra 33 specification (that supports
the 33 MB/second transfer rate) has been implemented at this IDE controller. The ATA bus pins
and the buffer (read ahead and posted write) are all dedicated for separate channel to improve the
performance of IDE master.
The M1533 supports Super Green function for Intel and Intel compatible CPUs. It implements SMI
or SCI (System Controller Interrupt) to meet the ACPI specification. It also meets the requirement
for OnNow design initiative.
including On, Standby, Sleeping, SoftOff, and Mechanical Off states. To control the CPU power
consumption, it provides CPU clock control (STPCLKJ). The STPCLKJ can be active (low) or
inactive (high) in turn by throttling control. In addition, the M1533 offers the most flexible system
clock design. It can be programmed to stop the CPU Clock, PCI Clock, the Clock cell, or to reduce
the Clock frequency. The PBSRAM (Pipelined-burst SRAM) doze mode is also supported.
The M1533 is includes a PS/2 keyboard/mouse controller, SMBus, two OpenHCI 1.0a USB ports,
and the dedicated GPIO (General Purpose Input/Output) pins. These components enable the chip
to implement the best green and cost/performance system.
2.2.2.1
Features
Provides a bridge between the PCI bus and ISA bus for both Pentium and Pentium Pro
systems
PCI interface
PCI master and slave interface
PCI master and slave initiated termination
PCI spec. 2.1 compliant (Delayed Transaction support)
Buffers control
8-byte bidirectional line buffers for DMA/ISA memory read/write cycles to PCI bus
32-bit posted write buffer for PCI memory write and I/O data write (for sound card) to ISA
bus
Provides steerable PCI interrupts for PCI device plug-and-play
Up to eight PCI interrupt routing
Level-to-edge trigger transfer
Enhanced DMA controller
Provides 7 programmable channels: 4 for 8-bit data size, 3 for 16-bit data size
32-bit addressability
Provides compatible DMA transfers
Provides Type F transfers
Interrupt controller
Provides 14 interrupt channels
Major Chips Description
It also features powerful power management for power saving
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