Acer 390 Series Service Manual page 57

Table 2-2 PCI1250 Terminal Functions
Name
IOWR M02
OE L03
READY/IREQ Y04
REG Y02
RESET W01
WAIT V05
Major Chips Description
No. I/O Type
C19 O
C20 O
A10 I
B12 O
C13 O
B10 I
Function
I/O Write IOWR is driven low by the PCI1250A to
strobe write data into 16-bit l/O PC Cards during
host l/O write cycles.
DMA Read. This pin is used as the DMA write
strobe during DMA operations from a 16-bit PC
Card that supports DMA. The PCI1250A asserts
this signal during transfers from host memory to
the PC Card.
Output Enable. OE is driven low by the PCl1250A
to enable 16-bit Memory PC Card data output
during host memory read cycles.
DMA terminal count. This pin is used as TC during
DMA operations to a 16-bit PC Card which supports
DMA. The PCI1250A asserts this signal to indicate
terminal count for a DMA write operation
The ready function is provided by the READY signal
when the 16-bit PC Card and the host socket are
configured for the memory-only interface. READY
is driven low by the 16-bit Memory PC Cards to
indicate that the memory card circuits are busy
processing a previous write command. READY is
driven high when the 16-bit Memory PC Card is
ready to accept a new data transfer command.
Interrupt Request. IREQ is asserted by a 16-bit l/O
PC Card to indicate to the host that a device on the
16-bit l/O PC Card requires service by the host
software. IREQ is high (deasserted) when no
interrupt is requested.
Attribute memory select. REG remains high for all
common memory accesses. When REG is asserted
access is limited to attribute memory (OE or WE
active) and to 1he l/O space (IORD or IOWR
active}. Attribute memory is a separately accessed
section of card memory and is generally use to
record card capacity and other configuration and
attribute information.
DMA acknowledge. This pin is used as a DACK
during DMA operations to a 16-bit PC Card that
supports DMA. The PCI1250A asserts this signal to
indicate a DMA operation. This signal is used in
conjunction with the DMA read (IOWR) or DMA
write (IORD) strobes to transfer data.
PC Card reset. RESET forces a hard reset to a 16-
bit PC Card
Bus cycle wait. WAIT is driven by a 16-bit PC Card
to delay the completion of (i.e.. extend) the memory
or l/O cycle that is in progress.
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