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2.3.3
Pin Descriptions
Conventions used in the pin description types:
I
Input into NM2160
O
Output from NM2160
I/O
Input and Output to/from NM2160
T/S
Tri-state during un-driven state
S/T/S
Before becoming tri-state the pin will be driven inactive
O/D
Open-drain type output
Table 2-3
NM2160 Pin Descriptions
Number
Pin name
PCI Interface
61
AD31
60
AD30
58
AD29
56
AD28
55
AD27
54
AD26
53
AD25
AD24
52
AD23
50
49
AD22
48
AD21
47
AD20
46
AD19
45
AD18
43
AD17
41
AD16
AD15
39
AD14
38
37
AD13
36
AD12
35
AD11
34
AD10
33
AD9
32
AD8
30
AD7
AD6
28
AD5
26
24
AD4
22
AD3
21
AD2
20
AD1
19
AD0
63
C/BE3#
51
C/BE2#
40
C/BE1#
31
C/BE0#
Major Chips Description
I/O
I/O
Multiplexed Address and Data 31:0 These multiplexed and bi-
T/S
directional pins are used to transfer address and data on the PCI
bus. The bus master will drive the 32-bit physical address during
address phase and data during data phase for write cycles.
NM2160 will drive the data bus during data phase for read cycles
I/O
Multiplexed Command and Byte Enable These multiplexed pins
provide the command during address phase and byte enable(s)
during data phase to the NM2160. NM2160 drives this pin in the
Bus Master mode
Description
2-31
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