1. Manuals
  2. Brands
  3. Acer Manuals
  4. Laptop
  5. TM7300 Series
  6. Service manual

Acer TM7300 Series Service Manual

Notebook computer
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
TM7300 Series
Notebook Computer
Service Guide
PART NO.: 49.42A01.001
DOC. NO.: SG238-9712A
PRINTED IN TAIWAN

Advertisement

Table of Contents
loading

Related Manuals for Acer TM7300 Series

Summary of Contents for Acer TM7300 Series

  • Page 1 TM7300 Series Notebook Computer Service Guide PART NO.: 49.42A01.001 DOC. NO.: SG238-9712A PRINTED IN TAIWAN...
  • Page 2 Further, Acer Incorporated reserves the right to revise this publication and to make changes from time to time in the contents hereof without obligation of Acer Incorporated to notify any person of such revision or changes.

  • Page 3: System Introduction

    About this Manual Purpose This service guide aims to furnish technical information to the service engineers and advanced users when upgrading, configuring, or repairing the TM7300 series notebook computer. Manual Structure This service guide contains technical information about the TM7300 series notebook computer. It consists of three chapters and five appendices.
  • Page 4 Appendix D Schematics This appendix contains the schematic diagrams for the system board. Appendix E BIOS POST Checkpoints This appendix lists and describes the BIOS POST checkpoints. Conventions The following are the conventions used in this manual: Represents text input by the user. Text entered by user Denotes actual messages that appear onscreen.

  • Page 5: Table Of Contents

    Table of Contents Chapter 1 System Introduction Features ......................1-1 1.1.2 FlashStart Automatic Power-On ............1-2 Ports ........................1-3 1.2.1 Rear Panel Ports................... 1-3 1.2.2 Left Panel Ports ..................1-4 1.2.3 Indicator Lights..................1-5 1.2.4 Hot Keys ....................1-6 1.2.5 Automatic Tilt..................
  • Page 6 1.6.14 PCMCIA....................1-35 1.6.15 Parallel Port ..................1-36 1.6.16 Serial Port....................1-36 1.6.17 Touchpad.....................1-36 1.6.18 SIR/FIR....................1-37 1.6.19 LCD .....................1-37 1.6.20 CD-ROM....................1-38 1.6.21 Diskette Drive ..................1-38 1.6.22 Hard Disk Drive..................1-39 1.6.23 Keyboard .....................1-39 1.6.24 Battery ....................1-40 1.6.25 DC-DC Converter.................1-40 1.6.26 DC-AC Inverter ..................1-41 1.6.27 AC Adapter ..................1-41 System Block Diagrams..................1-42 1.7.1...
  • Page 7 2.4.3 Pin Diagram ..................2-40 2.4.4 Pin Descriptions ...................2-41 Philips 87C552 System Management Controller ..........2-43 2.5.1 Features....................2-43 2.5.2 Block Diagram ..................2-44 2.5.3 Pin Diagram ..................2-45 2.5.4 Pin Descriptions ...................2-46 NS87338VJG Super I/O Controller..............2-48 2.6.1 Features....................2-48 2.6.2 Block Diagram ..................2-50 2.6.3 Pin Diagram ..................2-51 2.6.4 Pin Description..................2-52 CL-PD6832: PCI-to-CardBus Host Adapter ............2-59...
  • Page 8 Advanced System Configuration................3-5 3.3.1 Internal Cache..................3-5 3.3.2 External Cache ..................3-5 3.3.3 Enhanced IDE Features .................3-5 3.3.4 Onboard Communication Ports ..............3-6 3.3.5 Onboard USB..................3-6 3.3.6 Reset PnP Resources ................3-7 Power Saving Options ..................3-8 3.4.1 When Lid is Closed ................3-8 3.4.2 Suspend to Disk on Critical Battery ............3-8 3.4.3 Display Always On .................3-8 3.4.4...
  • Page 9 4.8.1 Detaching the Lower Housing from the Inside Assembly ......4-14 4.8.2 Detaching the Upper Housing from the Inside Assembly ......4-15 4.8.3 Removing the Touchpad ..............4-16 4.8.4 Removing the Main Board..............4-16 Disassembling the Display ..................4-19 Appendices Appendix A Model Number Definition Appendix B Exploded View Diagram Appendix C...
  • Page 10 List of Figures Lid Switch ......................1-2 Rear Port Location....................1-3 Left Port Location ....................1-4 Indicator Lights .....................1-5 System Board (Top Side)..................1-12 System Board (Bottom Side)................1-13 Media Board (Top Side)..................1-14 Media Board (Bottom Side).................1-15 Mainboard Jumpers and Connectors (Top Side) ..........1-16 1-10 Mainboard Jumpers and Connectors (Bottom Side) ..........1-17 1-11 Media Board Jumpers and Connectors (Top Side) ..........1-18...
  • Page 11 Installing and Removing Memory................. 4-8 Removing the Display Hinge Covers..............4-10 4-10 Removing the Center Hinge Cover ..............4-10 4-11 Lifting Out the Keyboard ..................4-11 4-12 Unplugging the Keyboard Connectors and Removing the Keyboard....4-11 4-13 Removing the CPU Heat Sink................4-12 4-14 Removing the CPU Module.................4-12 4-15 Unplugging the Display Cable ................4-13 4-16...
  • Page 12 List of Tables Rear Port Descriptions ..................1-3 Left Port Descriptions....................1-5 Indicator Light Descriptions...................1-5 Hot Key Descriptions ....................1-6 Eject Menu Item Descriptions ................1-7 System Specifications...................1-9 Mainboard Jumpers Pads Settings (Bottom Side) ..........1-17 System Memory Map..................1-19 Interrupt Channel Map ..................1-19 1-10 I/O Address Map....................1-19 1-11 DMA Channel Map....................1-20 1-12...
  • Page 13 1-35 Battery Specifications ..................1-40 1-36 DC-DC Converter Specifications.................1-40 1-37 DC-AC Inverter Specifications ................1-41 1-38 AC Adapter Specifications ..................1-41 1-39 Environmental Requirements................1-44 1-40 Mechanical Specifications...................1-45 Major Chips List ....................2-1 82371AB Pin Descriptions..................2-9 NM2160 Pin Descriptions..................2-31 NMA1 Pin Descriptions ..................2-41 87C552 Pin Descriptions..................2-46 NS87338VJG Pin Descriptions................2-52 CL-PD6832 Pin Descriptions................2-62...

  • Page 14: Chapter 1 System Introduction

    System Introduction The computer is packed with features that make it as easy to work with as it is to look at. Here are some of the computer’s features: Features PERFORMANCE ® Intel Pentium II 266 MHz processor 64-bit main memory and 512KB external (L2) cache memory Large display in active-matrix TFT PCI local bus video with 128-bit graphics accelerator Flexible module bay (3.5-inch floppy drive or CD-ROM drive or DVD-ROM drive or LS120 or...

  • Page 15: Flashstart Automatic Power-On

    Ergonomically-positioned touchpad pointing device EXPANDABILITY CardBus PC Card (PCMCIA) slots (two type II/I or one type III) with Zoomed Video port function Mini-dock option with two CardBus PC Card slots (two type II/I or one type III) USB port onboard Upgradeable memory and hard disk 1.1.2 FlashStart Automatic Power-On...

  • Page 16: Ports

    Ports The computer’s ports allow you to connect peripheral devices to your computer just as you would to a desktop PC. The main ports are found on the computer’s rear panel. The computer’s left panel contains the computer’s multimedia ports and PC card slots. 1.2.1 Rear Panel Ports The computer’s rear panel contains the computer’s main ports and connectors as shown in the...

  • Page 17: Left Panel Ports

    UNIVERSAL SERIAL BUS (USB) PORT The computer’s USB (Universal Serial Bus) port located on the rear panel allows you to connect peripherals without occupying too many resources. Common USB devices include the mouse and keyboard. FAST INFRARED (FIR) PORT The computer’s FIR (fast infrared) port located on the rear panel allows you to transfer data to IR- aware machines without cables.

  • Page 18: Indicator Lights

    Table 1-2 Left Port Descriptions Port Icon Connects to... PC Card slots Two type I/II PC Cards or one type III Card Microphone-in/ Line-in External microphone or line input device Speaker-out/ Line-out Amplified speakers or headphones PC CARD SLOTS The computer contains two PC card slots on the left panel that accommodate two type I/II or one type III PC card(s).

  • Page 19: Hot Keys

    1.2.4 Hot Keys The computer’s special Fn key, used in combination with other keys, provides “hot-key” combinations that access system control functions, such as screen contrast, brightness, volume output, and the BIOS setup utility. Table 1-4 Hot Key Descriptions Hot Key Icon Function Description...

  • Page 20: Eject Menu Item Descriptions

    Table 1-4 Hot Key Descriptions Hot Key Icon Function Description á Brightness Up Increases screen brightness á Brightness Down Decreases screen brightness á Contrast Up Increases screen contrast (not available for TFT displays) á Contrast Down Decreases screen contrast (not available for TFT displays) Fuel Gauge Up With the fuel gauge displayed, moves the fuel gauge up Fuel Gauge Down...

  • Page 21: System Specification Overview

    System Specification Overview Table 1-6 System Specifications Item Standard Optional ® Microprocessor Intel Pentium II 266 MHz processor Memory System / Main 64MB Expandable to 128MB using Dual 64-bit memory banks 8/16/32/64MB soDIMMs External cache 512KB L2 cache (synchronous SRAM) Flash BIOS 256KB Storage system...

  • Page 22: System Specifications

    Table 1-6 System Specifications Item Standard Optional One fast infrared port (IrDA-compliant) External IR adapter One 3.5mm minijack microphone-in/line-in Microphone or line-in device jack One 3.5mm minijack speaker-out/line-out Speakers or headphones jack One USB port USB device Weight (includes battery) with FDD 3.5 kg.

  • Page 23: Board Layout

    Board Layout 1-10 Service Guide...

  • Page 24: System Board (Top Side)

    1.4.1 System Board (Top Side) Figure 1-5 System Board (Top Side) System Introduction 1-11...

  • Page 25: System Board (Bottom Side)

    1.4.2 System Board (Bottom Side) Figure 1-6 System Board (Bottom Side) 1-12 Service Guide...

  • Page 26: Media Board (Top Side)

    1.4.3 Media Board (Top Side) Figure 1-7 Media Board (Top Side) System Introduction 1-13...

  • Page 27: Media Board (Bottom Side)

    1.4.4 Media Board (Bottom Side) Figure 1-8 Media Board (Bottom Side) 1-14 Service Guide...

  • Page 28: Mainboard Jumpers And Connectors (Top Side)

    Jumpers and Connectors 1.5.1 Mainboard CN10 CN11 CN12 CN13 CN14, CN15 CN8, CN9 Multimedia board connector VGA port CN10 FDD/CD-ROM connector Mini dock port CN14, CN15 CPU board connector Parallel port CN13 Hard disk drive connector Serial Port CN12 Speaker-out/Line-out Jack PS2 mouse/keyboard port CN11 Microphone-in/Line-in Jack...

  • Page 29: Mainboard Jumpers And Connectors (Bottom Side)

    Mainboard Jumpers Pads Settings (Bottom Side) Jumper Pad Descriptions Settings SW2(1) Keyboard type selection OFF: Other keyboard ON: Japan keyboard SW2(2) Password settings OFF: Enable password ON: Bypass password SW2(3) BIOS type selection OFF: Acer BIOS ON: OEM BIOS SW2(4) Reserved 1-16 Service Guide...

  • Page 30: Media Board Jumpers And Connectors (Bottom Side)

    1.5.2 Media Board CN4 CN5 CN6 Lid switch Touchpad connector LCD connector CN4, CN5 Keyboard connector Figure 1-11 Media Board Jumpers and Connectors (Top Side) CN7, CN8 Mainboard connector PCMCIA socket connector Figure 1-12 Media Board Jumpers and Connectors (Bottom Side) System Introduction 1-17...

  • Page 31: System Configurations And Specifications

    System Configurations and Specifications 1.6.1 System Memory Map Table 1-8 System Memory Map Address Range Definition Function 000000 -09FFFF 640 KB memory Base memory 0A0000 -0BFFFF 128 KB video RAM Reserved for graphics display buffer 0C0000 -0CBFFF Video BIOS Video BIOS 0CC000 -0CDFFF System CardBus 0CE000 -0CFFFF...

  • Page 32: Dma Channel Map

    Table 1-10 I/O Address Map Address Range Device 070 -071 Real-time clock and NMI mask 080 -08F DMA page register 0A0 -0A1 Interrupt controller-2 0C0 -0DF DMA controller-2 1F0 -1F7 Hard disk select 3F6 -3F7 Hard disk select CD-ROM select 170 -177 CD-ROM select 376 -377...

  • Page 33: Gpio Port Definition Map

    1.6.5 GPIO Port Definition Map Table 1-12 GPIO Port Definition Map I GPIO/Signal Pin # Description GPIO Pin Assignment: PIIX4 SUSA# (PX3_SUSA#) 0: Power down clock generator GPO0 (PX3_DOCKRST#) 0 : Enable docking reset GPO1 (PX3_HDPON) 1: Turn on HDD power GPO2 (PX3_ CD/FDPON) 1: Turn on CD/FDD power GPO3 (PX3_ HDRST#)
  • Page 34 Table 1-12 GPIO Port Definition Map I GPIO/Signal Pin # Description GPI1 (DK3_DOCKIRQ#) 0: Detect Docking IRQ GPI2/REQA# (PX3_OEM0) OEM detection GPI3/REQB# (SM5_BAYSW) Detect FDD/CD bay 1: installed, 0: not installed GPI4/REQC# (CF5_FDD/CD#) Detect FDD or CD installed 1: FDD, 0: CD GPI5/APICREQ# GPI6/IRQ8# (RT3_IRQ8#) 0: RTC wake...
  • Page 35 Table 1-13 GPIO Port Definition Map II GPIO Description P1.7 (IS5_IRQ12) IRQ12 P2.0 (KB5_MEMB0A0) Address 0 of memory bank 0 P2.1 (KB5_MEMB0A1) Address 1 of memory bank 0 P2.2 (KB5_MODE) Detect KBD mode (1:US/EC 0:Japan) P2.3 P2.4 (KB5_MEMB1A0) Address 0 of memory bank 1 P2.5 (KB5_PSWD) Enable Password P2.6 (KB5_MEMB1A1)

  • Page 36: Pci Devices Assignment

    Table 1-13 GPIO Port Definition Map II GPIO Description P2.1 P2.2 (SM5_BAYSW) Detect FDD/CD bay installed or not P2.3 P2.4 P2.5 P2.6 P2.7 P3.0 (SM5_RXD) Receiving data from KBC to SMC P3.1 (SM5_TXD) Transmitting data from SMC to KBC P3.2 (SM5_DOCKSW) Dock switch sense P3.3 (CF5_DOCKED) Detect completely docked or not...

  • Page 37: Power Management

    Since the power management is implemented by linking with APM interface closely, the APM function in Win95 or Win3.1 must be enabled and set to advanced level for optimum power management and the driver that installed in system must be Acer authorized and approved. 1-24...

  • Page 38: Pmu Timers List

    1.6.7.1 PMU Timers There are several devices related timers available on the V1-LS chip. Each timer may have zero or more devices assigned to the timer for the purpose of retriggering the timer. Table 1-15 PMU Timers List Item Descriptions Video timer Timer value 30sec, 1min, 1.5min, 2min, 2.5min, 3min, 3.5min, 4min, 4.5min, 5min, 6min, 7min,...
  • Page 39 Table 1-15 PMU Timers List Item Descriptions System activities System activities and timer retriggers Power off either or both FDD and CD-ROM. Tri-state FDD and CD-ROM interfaces and stop IDE controller clock. Timer retriggers The I/O access to 3F2, 3F4, 3F5(FDD), 3F7, 376(CD ROM) will retrigger the timer.
  • Page 40 3. CD-ROM Reset [pin-U13 of U21(PX3_CDRST#) of PIIX4]. The reset pin is used to assert the hard reset needed for the CD-ROM during power up. The reset pin is asserted before CD-ROM power up and is deasserted after CD-ROM power up and before the buffer is enabled.
  • Page 41 Recovery from power down is the opposite procedure. SIR (UART) The FIR port is basically UART2. The UART operates off of a 14MHz clock. The IR port has a DA converter. The UART2 disable control circuit is within the 87338 chip. 1.
  • Page 42 The CPU clock. The clock to the CPU can be physically stopped. The chip is static, so the current state is retained. During a clock stop state, the CPU is stopped and the internal cache and external bus signals are inoperative. Therefore, any bus master or DMA activity is halted as well.

  • Page 43: Cpu Module

    For suspend-to-disk, all devices are read, saved to local memory and the local memory, video memory are saved to a disk file which is created by SLEEP MANAGER utility. The machine is then commanded to an off state. Resume events for zero-volt suspend(suspend-to-disk) The only resume event for zero-volt suspend is the raising of the lid of the computer.

  • Page 44: Bios

    1.6.9 BIOS Table 1-17 BIOS Specifications Item Specification BIOS programming vendor Acer BIOS version V3.0 BIOS ROM type Intel 28F002, Flash ROM with boot block protection BIOS ROM size 256KB BIOS ROM package type 40-pin TSOP Same BIOS for TFT LCD type...

  • Page 45: Video Memory

    1.6.10.1 SIMM Memory Combination List Table 1-19 SIMM Memory Combination List RAM Size Bank A Bank B 16MB 16MB 16MB 16MB 16MB 24MB 16MB 24MB 16MB 32MB 16MB 16MB 32MB 32MB 32MB 32MB 40MB 32MB 40MB 32MB 48MB 16MB 32MB 48MB 32MB 16MB...

  • Page 46: Video Display Modes

    1.6.12 Video Display Modes Table 1-21 Video Display Specification Item Specification Chip vendor NeoMagic Chip name NMG2160 Chip voltage 3.3 Volts ZV port support (Y/N) Graph interface (ISA/VESA/PCI) PCI bus Max. resolution (LCD) 800x600 (16M colors) True Color Max. resolution (Ext. CRT) 1024x768 (64K colors) High Color 1.6.12.1 External CRT Resolution Modes...

  • Page 47: Audio

    1.6.13 Audio Table 1-24 Audio Specifications Item Specification Chipset Neomagic-3097 Audio onboard or optional Built-in Mono or stereo stereo Resolution 16-bit Compatibility Sound Blaster Game, Windows Sound System, Plug&Play ISA 1.0a Music synthesizer 20-voice, 72 operator, FM music synthesizer Mixed sound sources Voice, Synthesizer, Line-in, Microphone, CD Voice channel 8-/16-bit, mono/stereo...

  • Page 48: Parallel Port

    1.6.15 Parallel Port Table 1-26 Parallel Port Specifications Item Specification Number of parallel ports ECP/EPP support Yes (by BIOS Setup) ECP DMA channel (by BIOS Setup) DRQ1 or DRQ3 Connector type 25-pin D-type Connector location Rear side Selectable parallel port (by BIOS Setup) Parallel 1 (378h, IRQ7) or Parallel 2 (3BCh, IRQ7) or Parallel 3 (278h, IRQ5) or...

  • Page 49: Sir/Fir

    1.6.18 SIR/FIR Table 1-29 SIR/FIR Specifications Item Specification Vendor & model name IBM(31T1100A) Input power supply voltage Transfer data rate 115.2 Kbit/s(Max)(SIR)~4 Mbit/s(FIR)(Max) Transfer distance 100cm Compatible standard IrDA (Infrared Data Association) Output data signal voltage level Active Non-active Vcc-0.5 Angle of operation Number of IrDA ports 16550 UART support...

  • Page 50: Cd-Rom

    1.6.20 CD-ROM Table 1-31 CD-ROM Specifications Item Specification Vendor & model name KYUSHU MATSHITA: UJDA110 Internal CD-ROM/FDD hot-swappable BIOS auto-detect CD-ROM existence BIOS support boot from CD drive feature Performance specification Speed 2100KB/sec(14X speed) Access time 150ms Buffer memory 128kbyte Interface Enhanced IDE (ATAPI) compatible (communicate with system via system E-IDE channel 2)

  • Page 51: Hard Disk Drive

    1.6.22 Hard Disk Drive Table 1-33 Hard Disk Drive Specifications Item Specification Vendor & Model Name IBM DTCA-23240 IBM DTCA-24090 Drive Format Capacity (GB) 4.09 3.24 Bytes per sector Logical heads Logical sectors Logical cylinders 6304 7944 Physical read/write heads Disks Rotational speed (RPM) 4000...

  • Page 52: Battery

    1.6.24 Battery Table 1-35 Battery Specifications Item Specification Vendor & Model Name Sony BTP-S31 Battery Gauge Battery type Li-Ion Cell capacity 2700mAH Cell voltage 3.6V Number of battery cell 6-Cell Package configuration 3 serial, 2 parallel Package voltage 10.8V Package capacity 58.3WH Second battery 1.6.25...

  • Page 53: Dc-Ac Inverter

    1.6.26 DC-AC Inverter DC-AC inverter is used to generate very high AC voltage, then supply to LCD CCFT backlight use. The DC-AC inverter area should be void to touch while the system unit is turned on. Table 1-37 DC-AC Inverter Specifications Item Specification Vendor &...

  • Page 54: System Block Diagrams

    System Block Diagrams 1.7.1 System Functional Block Diagram Figure 1-13 System Functional Block Diagram System Introduction 1-41...

  • Page 55: System Bus Block Diagram

    1.7.2 System Bus Block Diagram Figure 1-14 System Bus Block Diagram 1-42 Service Guide...

  • Page 56: Environmental Requirements

    Environmental Requirements Table 1-39 Environmental Requirements Item Specification Temperature Operating (ºC) +5 ~ +35 Non-operating(ºC)(unpacked) -10 ~ +60 Non-operating(ºC)(storage package) -20 ~ +60 Humidity Operating (non-condensing) 20% ~ 80% Non-operating (non-condensing) 20% ~ 80% (unpacked) Non-operating (non-condensing) (storage 20% ~ 90% package) Operating Vibration (sine mode) Operating...

  • Page 57: Mechanical Specifications

    Mechanical Specifications Table 1-40 Mechanical Specifications Item Specification Weight (includes battery and FDD) 12.1 TFT SVGA LCD and 12.5mm HDD 3.3 kgs (7.2 lbs) Adapter 230 g (0.52 lb) Dimensions round contour 297~313mm x 233~240mm x 50~53mm main footprint 11.7” x 9.1” x 2” 1-44 Service Guide...

  • Page 58: Major Component List

    Major Chips Description This chapter discusses the major components. Major Component List Table 2-1 Major Chips List Component Vendor Description PIIX4(82371AB) Intel South Bridge NM2160 NeoMagic Flat Panel Video Accelerator NMA1 NeoMagic Audio chip 87C552 Philips Single-chip 8-bit controller for SMC (System Management Controller) NS97338 NS (National Semiconductor)

  • Page 59: Intel Piix4

    Intel PIIX4 PIIX4 is a multi-function PCI device that integrates many system-level functions. PCI to ISA/EIO Bridge PIIX4 is compatible with the PCI Rev 2.1 specification, as well as the IEEE 996 specification for the ISA (AT) bus. On PCI, PIIX4 operates as a master for various internal modules, such as the USB controller, DMA controller, IDE bus master controller, distributed DMA masters, and on behalf of ISA masters.
  • Page 60 The timer/counter block contains three counters that are equivalent in function to those found in one 82C54 programmable interval timer. These three counters are combined to provide the system timer function, refresh request, and speaker tone. The 14.31818-MHz oscillator input provides the clock source for these three counters.

  • Page 61: Features

    Enhanced Power Management PIIX4’s power management functions include enhanced clock control, local and global monitoring support for 14 individual devices, and various low-power (suspend) states, such as Power-On Suspend, Suspend-to-DRAM, and Suspend-to-Disk. A hardware-based thermal management circuit permits software-independent entrance to low-power states. PIIX4 has dedicated pins to monitor various external events (e.g., interfaces to a notebook lid, suspend/resume button, battery low indicators, etc.).
  • Page 62 Full Support for Advanced Configuration and Power Interface (ACPI) Revision 1.0 Specification and OS Directed Power Management Integrated IDE Controller Independent Timing of up to 4 Drives PIO Mode 4 and Bus Master IDE Transfers up to 14 Mbytes/sec Supports “Ultra DMA/33” Synchronous DMA Mode Transfers up to 33 Mbytes/sec Integrated 16 x 32-bit Buffer for IDE PCI Burst Transfers Supports Glue-less “Swap-Bay”...

  • Page 63: Architecture Block Diagram

    The 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multi-function PCI device implementing a PCI-to- ISA bridge function, a PCI IDE function, a Universal Serial Bus host/hub function, and an Enhanced Power Management function. As a PCI-to-ISA bridge, PIIX4 integrates many common I/O functions found in ISA-based PC systems—two 82C37 DMA Controllers, two 82C59 Interrupt Controllers, an 82C54 Timer/Counter, and a Real Time Clock.

  • Page 64: Block Diagram

    2.2.3 Block Diagram Figure 2-2 PIIX4 Simplified Block Diagram Major Chips Description...

  • Page 65: Pin Descriptions

    2.2.4 Pin Descriptions This section provides a detailed description of each signal. The signals are arranged in functional groups according to their associated interface. The “#” symbol at the end of a signal name indicates that the active, or asserted state occurs when the signal is at a low voltage level.

  • Page 66: 82371Ab Pin Descriptions

    Table 2-2 82371AB Pin Descriptions Name Type Description PCI BUS INTERFACE AD[31:0] PCI ADDRESS/DATA. AD[31:0] is a multiplexed address and data bus. During the first clock of a transaction, AD[31:0] contain a physical byte address (32 bits). During subsequent clocks, AD[31:0] contain data. A PIIX4 Bus transaction consists of an address phase followed by one or more data phases.
  • Page 67 Table 2-2 82371AB Pin Descriptions Name Type Description IRDY# INITIATOR READY. IRDY# indicates PIIX4’s ability, as an Initiator, to complete the current data phase of the transaction. It is used in conjunction with TRDY#. A data phase is completed on any clock both IRDY# and TRDY# are sampled asserted.
  • Page 68 Table 2-2 82371AB Pin Descriptions Name Type Description TRDY# TARGET READY. TRDY# indicates PIIX4’s ability to complete the current data phase of the transaction. TRDY# is used in conjunction with IRDY#. A data phase is completed when both TRDY# and IRDY# are sampled asserted. During a read, TRDY# indicates that PIIX4, as a Target, has place valid data on AD[31:0].
  • Page 69 Table 2-2 82371AB Pin Descriptions Name Type Description IOW# I/O WRITE. IOW# is the command to an ISA I/O slave device that the slave may latch data from the ISA data bus (SD[15:0]). IOW# is an output when PIIX4 owns the ISA Bus.
  • Page 70 Table 2-2 82371AB Pin Descriptions Name Type Description SA[19:0] SYSTEM ADDRESS[19:0]. These bi-directional address lines define the selection with the granularity of 1 byte within the 1-Megabyte section of memory defined by the LA[23:17] address lines. The address lines SA[19:17] that are coincident with LA[19:17] are defined to have the same values as LA[19:17] for all memory cycles.
  • Page 71 Table 2-2 82371AB Pin Descriptions Name Type Description KBCCS#/ KEYBOARD CONTROLLER CHIP SELECT. KBCCS# is asserted during I/O read or write accesses to KBC locations 60h and 64h. It is driven combinatorially GPO26 from the ISA addresses SA[19:0] and LA[23:17]. If the keyboard controller does not require a separate chip select, this signal can be programmed to a general purpose output.
  • Page 72 Table 2-2 82371AB Pin Descriptions Name Type Description XOE#/ X-BUS TRANSCEIVER OUTPUT ENABLE. XOE# is tied directly to the output enable of a 74’245 that buffers the X-Bus data, XD[7:0], from the system data GPO23 bus, SD[7:0]. XOE# is asserted anytime a PIIX4 supported X-Bus device is decoded, and the devices decode is enabled in the X-Bus Chip Select Enable Register (BIOSCS#, KBCCS#, RTCCS#, MCCS#) or the Device Resource B (PCCS0#) and Device Resource C (PCCS1#).
  • Page 73 Table 2-2 82371AB Pin Descriptions Name Type Description INTERRUPT CONTROLLER/APIC SIGNALS APICACK#/ APIC ACKNOWLEDGE. This active low output signal is asserted by PIIX4 after its internal buffers are flushed in response to the APICREQ# signal. When the I/O GPO12 APIC samples this signal asserted it knows that PIIX4’s buffers are flushed and that it can proceed to send the APIC interrupt.
  • Page 74 Table 2-2 82371AB Pin Descriptions Name Type Description IRQ 12/M INTERRUPT REQUEST 12. In addition to providing the standard interrupt function as described in the pin description for IRQ[3:7,9:11,14:15], this pin can also be programmed to provide the mouse interrupt function. When the mouse interrupt function is selected, a low to high transition on this signal is latched by PIIX4 and an INTR is generated to the CPU as IRQ12.
  • Page 75 Table 2-2 82371AB Pin Descriptions Name Type Description INIT INITIALIZATION. INIT is asserted in response to any one of the following conditions. When the System Reset bit in the Reset Control Register is reset to 0 and the Reset CPU bit toggles from 0 to 1, PIIX4 initiates a soft reset by asserting INIT.
  • Page 76 Table 2-2 82371AB Pin Descriptions Name Type Description PCICLK FREE-RUNNING PCI CLOCK. A clock signal running at 30 or 33 MHz, PCICLK provides timing for all transactions on the PCI Bus. All other PCI signals are sampled on the rising edge of PCICLK, and all timing parameters are defined with respect to this edge.
  • Page 77 Table 2-2 82371AB Pin Descriptions Name Type Description PDDACK# PRIMARY DMA ACKNOWLEDGE. This signal directly drives the IDE device DMACK# signal. It is asserted by PIIX4 to indicate to IDE DMA slave devices that a given data transfer cycle (assertion of PDIOR# or PDIOW#) is a DMA data transfer cycle.
  • Page 78 Table 2-2 82371AB Pin Descriptions Name Type Description SDA[2:0] SECONDARY DISK ADDRESS[2:0]. These signals indicate which byte in either the ATA command block or control block is being addressed. If the IDE signals are configured for Primary and Secondary, these signals are connected to the corresponding signals on the Secondary IDE connector.
  • Page 79 Table 2-2 82371AB Pin Descriptions Name Type Description SDIOR# SECONDARY DISK IO READ. In normal IDE mode, this is the command to the IDE device that it may drive data onto the SDD[15:0] lines. Data is latched by the PIIX4 on the negation edge of SDIOR#. The IDE device is selected either by the ATA register file chip selects (SDCS1#, SDCS3#) and the SDA[2:0] lines, or the IDE DMA slave arbitration signals (SDDACK#).
  • Page 80 Table 2-2 82371AB Pin Descriptions Name Type Description POWER MANAGEMENT SIGNALS BATLOW#/ BATTERY LOW. Indicates that battery power is low. PIIX4 can be programmed to prevent a resume operation when the BATLOW# signal is asserted. If the GPI9 Battery Low function is not needed, this pin can be used as a general-purpose input.
  • Page 81 Table 2-2 82371AB Pin Descriptions Name Type Description SUSA# SUSPEND PLANE A CONTROL. Control signal asserted during power management suspend states. SUSA# is primarily used to control the primary power plane. This signal is asserted during POS, STR, and STD suspend states. During Reset: Low After Reset: High During POS: Low SUSB#/ SUSPEND PLANE B CONTROL.
  • Page 82 Table 2-2 82371AB Pin Descriptions Name Type Description GPO[30:0] GENERAL PURPOSE OUTPUTS. These output signals can be controlled via the GPIREG register located in Function 3 (Power Management) System IO Space at address PMBase+34h. If a GPO pin is not multiplexed with another signal or defaults to GPO, then its state after reset is the reset condition of the GPOREG register.
  • Page 83 Signal Multiplexed Default Control Register Notes Name With and Bit (PCI Function 1) GPO[9:11] GNT[A:C]# GENCFG Not available as GPO if using for PC/PCI. Can be Bits [8:10] individually enabled, so GPO[11] is available if REQ[C]# not used. GPO12 APICACK# XBCS Not available as GPO if using external APIC.
  • Page 84 Table 2-2 82371AB Pin Descriptions (continued) Name Type Description CONFIG2 CONFIGURATION SELECT 2. This input signal is used to select the positive or subtractive decode of FFFF0000h–FFFFFFFFh memory address range (top 64 Kbytes). If CONFIG[2]=0, the PIIX4 will positively decode this range. If CONFIG[2]=1, the PIIX4 will decode this range with subtractive decode timings only.

  • Page 85: Features

    NM2160 The NM2160 is a high performance Flat Panel Video Accelerator that integrates in one single chip, 2 Mbytes of High Speed DRAM, 24-bit true-color RAMDAC, Graphics/Video Accelerator, Dual clock synthesizer, TV Out support, ZV(Zoomed Video) port, Z-Buffer Data Stripping, PCI Bus Mastering and a high speed glueless 32-bit PCI 2.1 compliance interface.
  • Page 86 High Speed 2Mbytes of integrated DRAM 128 bit Memory Interface Bus Support PCI 2.1 compliance Local Bus(Zero wait states) 3.3Volts or 5Volts operation EMI Reduction Spread Spectrum Clocking technology for reduced panel EMI Hardware Cursor and Icon Relocatable Hardware Cursor and Icon 64X64 Hardware Cursor 64X64 or 128X128 Hardware Icon Green PC Support...

  • Page 87: Pin Diagram

    2.3.2 Pin Diagram Figure 2-3 NM2160 Pin Diagram 2-30 Service Guide...

  • Page 88: Pin Descriptions

    2.3.3 Pin Descriptions Conventions used in the pin description types: Input into NM2160 Output from NM2160 Input and Output to/from NM2160 Tri-state during un-driven state S/T/S Before becoming tri-state the pin will be driven inactive Open-drain type output Table 2-3 NM2160 Pin Descriptions Number Pin name...
  • Page 89 Table 2-3 NM2160 Pin Descriptions Number Pin name Description FRAME# Frame This active-low signal is driven by the bus master to indicate the beginning and duration of an access. NM2160 drives this pin in the Bus Master mode Parity Even parity across AD31:0&C/BE3:0# is driven by the bus master during address and write data phases and driven by NM2160 during read data phases TRDY#...
  • Page 90 Table 2-3 NM2160 Pin Descriptions Number Pin name Description XCKEN External Clock Enable This pin is used to select between internally synthesized clocks or externally supplied clocks. A low level on the pin selects internal mode and a high level selects external mode.
  • Page 91 Table 2-3 NM2160 Pin Descriptions Number Pin name Description FPBACK Flat Panel Backlight This is used to control the backlight power to the panels or as a General Purpose Output Pin as defined by register CR2F bits 3&2 PDATA35 Panel data These pins are used to provide the data interface to PDATA34 different kinds of panels.
  • Page 92 Table 2-3 NM2160 Pin Descriptions Number Pin name Description BLUE This DAC analog output drives the CRT interface (Analog) REXT DAC Current reference This pin is used as a current reference by (Analog) the internal DAC. Please refer to the NM2160 system schematics for the external circuit TV interface CSYNC...
  • Page 93 Table 2-3 NM2160 Pin Descriptions Number Pin name Description Chrominance Data 7:0 These are the 8-bits of chrominance data that are input to the ZV port of NM2160 Luminance Data 7:0 These are the 8-bits of luminance data that are input to the ZV port of NM2160 HREF Horizontal Synchronization Pulse: This input signal provides the horizontal synchronization pulse to the ZV port...
  • Page 94 Table 2-3 NM2160 Pin Descriptions Number Pin name Description 136, 154, DVSS DRAM ground AVSSM Analog ground for MCLK synthesizer AVSSV Analog ground for VCLK synthesizer AVSSR1 Analog ground for DAC AVSSR2 Analog ground for DAC current reference AVSSX1 Analog ground for crystal oscillator 25, 42, 57, HVDD Host bus interface VDD.(+5v or +3v) Includes the PCI, VL, CRT,...

  • Page 95: Nma1

    NMA1 NMA1 is a single audio chip that integrates OPL3 FM and its DAC, 16bit Sigma-delta CODEC, MPU401 MIDI interface, and a 3D enhanced controller including all the analog components which is suitable for multi-media application. This LSI is fully compliant with Plug and Play ISA 1.0a, and supports all the necessary features, i.e.

  • Page 96: Block Diagram

    2.4.2 Block Diagram Figure 2-4 NMA1 Block Diagram Major Chips Description 2-39...

  • Page 97: Pin Diagram

    2.4.3 Pin Diagram Figure 2-5 NMA1 Pin Diagram 2-40 Service Guide...

  • Page 98: Pin Descriptions

    2.4.4 Pin Descriptions Conventions used in the pin description types: Input Pin with Pull up Resistor TTL-tri-state output pin Schmitt: TTL-Schmitt input pin Output Pin with Pull up Resistor Table 2-4 NMA1 Pin Descriptions Pin name Number Description ISA bus interface: 36 pins D7-0 Data Bus A15-0...
  • Page 99 Table 2-4 NMA1 Pin Descriptions Pin name Number Description ADFLTR Right input filter VOCOL Left voice output VOCOR Right voice output VOCIL Left voice input VOCIR Right voice input Miscellaneous pins: 14 pins SYEN External synthesizer enable input SYCS External synthesizer chip select output SYCLK External synthesizer clock input or ZV clock input SYLR...

  • Page 100: Philips 87C552 System Management Controller

    Philips 87C552 System Management Controller The 87C552 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 87C552 has the same instruction set as the 80C51. The 87C552 contains a 8kx8 a volatile 256x8 read/write data memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a 15-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART...

  • Page 101: C552 Block Diagram

    2.5.2 Block Diagram Figure 2-6 87C552 Block Diagram 2-44 Service Guide...

  • Page 102: C552 Pin Diagram

    2.5.3 Pin Diagram 60 A V S S P 4 . 3 / C M S R 3 10 59 AVref+ P 4 . 4 / C M S R 4 11 58 AVref– P 4 . 5 / C M S R 5 12 57 P0.0/AD0 P 4 .

  • Page 103: Pin Descriptions

    2.5.4 Pin Descriptions Table 2-5 87C552 Pin Descriptions Mnemonic Pin No. Type Name And Function Digital Power Supply: +5V power supply pin during normal operation, idle and power-down mode. STADC Start ADC Operation: Input starting analog to digital conversion (ADC operation can also be started by software).
  • Page 104 Table 2-5 87C552 Pin Descriptions Mnemonic Pin No. Type Name And Function P4.0-P4.7 7-14 Port 4: 8-bit quasi-bidirectional I/O port. Alternate functions include: 7-12 CMSR0-CMSR5 (P4.0-P4.5): Timer T2 compare and set/reset outputs on a match with timer T2. 13, 14 13, 14 CMT0, CMT1 (P4.6, P4.7): Timer T2 compare and toggle outputs on a match with timer T2.

  • Page 105: Ns87338Vjg Super I/O Controller

    NS97338VJG Super I/O Controller The PC97338VJG is a single chip solution for most commonly used I/O peripherals in ISA, and EISA based computers. It incorporates a Floppy Disk Controller(FDC), two full featured UARTs, and an IEEE 1284 compatible parallel port Standard PC-AT address decoding for all the peripherals and a set of configuration registers are also implemented in this highly integrated member of the Super l/O family.
  • Page 106 The Bidirectional Parallel Port: Enhanced Parallel Port(EPP) compatible Extended Capabilities Port(ECP) compatible, including level 2 support Bidirectional under either software or hardware control Compatible with ISA, and EISA, architectures Ability to multiplex FDC signals on parallel port pins allows use of an external Floppy Disk Drive(FDD) Includes protection circuit to prevent damage to the parallel port when a connected printer is powered up or is operated at a higher voltage...

  • Page 107: Block Diagram

    2.6.2 Block Diagram Config. Serial Serial Interrupt Interrupt Inputs Interface Interface Interface U A R T Configuration U A R T + IrDA/HP & Sharp IR Registers (16550 or 16450) (16550 or 16450) Floppy Disk Floppy Controller with Drive Digital Data Interface Separator Floppy...

  • Page 108: Pin Diagram

    2.6.3 Pin Diagram Figure 2-9 NS97338VJG Pin Diagram Major Chips Description 2-51...

  • Page 109: Pin Description

    2.6.4 Pin Description Table 2-6 NS97338VJG Pin Descriptions Description A15-A0 67, 64, Address. These address lines from the microprocessor determine 62-60, which internal register is accessed. A0-A15 are don't cares during 29, 19- DMA transfer. /ACK Parallel Port Acknowledge. This input is pulsed low by the printer to indicate that it has received the data from the parallel port.
  • Page 110 Table 2-6 NS97338VJG Pin Descriptions Description /CTS1, 72, 64 UARTs Clear to Send. When low, this indicates that the modem or /CTS2 data set is ready to exchange data. The /CTS signal is a modem status input. The CPU tests the condition of this /CTS signal by reading bit 4 (CTS) of the Modem Status Register (MSR) for the appropriate serial channel.
  • Page 111 Table 2-6 NS97338VJG Pin Descriptions Description /DR1 FDC Drive Select 1. This pin offers an additional Drive Select signal in (PPM Mode) PPM Mode when PNF = 0. It is drive select 1 when bit 4 of FCR is 0. It is drive select 0 when bit 4 of FCR is 1.
  • Page 112 Table 2-6 NS97338VJG Pin Descriptions Description /HDSEL FDC Head Select. This output determines which side of the FDD is (Normal Mode) accessed. Active selects side 1, inactive selects side 0. /HDSEL FDC Head Select. This pin offers an additional Head Select signal in (PPM Mode) PPM Mode when PNF = 0.
  • Page 113 Table 2-6 NS97338VJG Pin Descriptions Description IRTX Infrared Transmit. Infrared serial data output. Software configuration selects either IrDA or Sharp-IR protocol. This pin is multiplexed with SOUT2/BOUT/CFG0. Master Reset. Active high output that resets the controller to the idle state and resets all disk interface outputs to their inactive states. The DOR, DSR, CCR, Mode command, Configure command, and Lock command parameters are cleared to their default values.
  • Page 114 Table 2-6 NS97338VJG Pin Descriptions Description /RI1 68, 60 UARTs Ring Indicator. When low, this indicates that a telephone ring /RI2 signal has been received by the modem. The /RI signal is a modem status input whose condition is tested by the CPU by reading bit 6 (RI) of the Modem Status Register (MSR) for the appropriate serial channel.

  • Page 115: Ns87338Vjg Pin Descriptions

    Table 2-6 NS97338VJG Pin Descriptions Description /TRK0 FDC Track 0. This pin gives an additional Track 0 signal in PPM Mode (PPM Mode) when PNF = 0. VDDB, C 48, 97 Power Supply. This is the 3.3V/5V supply voltage for the PC87332VJG circuitry.

  • Page 116: Cl-Pd6832: Pci-To-Cardbus Host Adapter

    CL-PD6832: PCI-to-CardBus Host Adapter The CL-PD6832 is a single-chip PC Card host adapter solution capable of controlling two fully independent CardBus sockets. The chip is compliant with PC Card Standard, PCMCIA 2.1, and JEDIA 4.1 and is optimized for use in notebook and handheld computers where reduced form factor and low power consumption are critical design objectives.

  • Page 117: Pin Diagram

    208-pin PQFP 2.7.2 Pin Diagram Figure 2-10 CL-PD6832 Pin Diagram 2.7.3 Pin Descriptions The following conventions apply to the pin description tables: A pound sign (#) at the end of a pin name indicates an active-low signal for the PCI bus. A dash (-) at the beginning of a pin name indicates an active-low signal for the PCMCIA bus.
  • Page 118 An asterisk (*) at the end of a pin name indicates an active-low signal that is a general-interface for the CL-PD6832. º A double-dagger superscript ( ) at the end of the pin name indicates signals that are used for power-on configuration switches.

  • Page 119: Cl-Pd6832 Pin Descriptions

    The following table lists the pin descriptions Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number Power PCI Bus Interface Pins AD[31:0] PCI Bus Address Input / Data Input/Outputs: 4-5, 7-12, 16-20, 22-24, 38-43, 45- These pins connect to PCI bus signals 46, 48 49, 51-56 AD[31:0].
  • Page 120 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number Power SERR# System Error: This output is pulsed by the CL- PD6832 to indicate an address parity error. Parity: This pin is sampled the clock cycle after completion of each corresponding address or write data phase.
  • Page 121 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number Power SIN# Serial Interrupt Input / PCI Bus Interrupt D / /INTD# Serial IRQ Data: In PCI Interrupt Signaling /ISDAT mode, this output can be used as an interrupt output connected to the PCI bus INTD# interrupt line.
  • Page 122 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. Pin No. Power (socket (socket Socket Interface Pins -REG/ 2 or 3 Register Access: In Memory Card Interface CC/BE3# mode, this output chooses between attribute and common memory. In l/O Card Interface mode, this signal is active (low) for non DMA transfers and high for DMA transfers.
  • Page 123 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. Pin No. Power (socket (socket A12/ PCMCIA socket address 12 output. In 2 or 3 CC/BE2# CardBus mode, this pin is the Cardbus C/BE2# signal. A[11:9]/ 77, 73, 153, 2 or 3 PCMCIA socket address 11:9 outputs.
  • Page 124 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. Pin No. Power (socket (socket -IORD/ 2 or 3 I/O Read: This output goes active (low) for CAD13 l/O reads from the socket to the CL- PD6832. In CardBus mode, this pin is the CardBus address/data bit 13.
  • Page 125 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. Pin No. Power (socket (socket -CE2/ Card Enable pin is driven low by the CL- 2 or 3 CAD10 PD6832 during card access cycles to control byte/word card access. -CE1 enables even-numbered address bytes, and -CE2 enables odd-numbered address bytes.
  • Page 126 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. Pin No. Power (socket (socket BVD1/ I-PU 2 or 3 Battery Voltage Detect 1 / Status Change -STSCHG/ / Ring Indicate: In Memory Card Interface -RI/ mode, this input serves as the BVD1 -CSTSCHG (battery-dead status) input.
  • Page 127 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number Power Power Control and General Interface Pins SPKR_OUTt I/O- Speaker Output: This output can be used as a digital output to a speaker to allow a system to support PCMCIA card fax/modem/voice and audio sound output.
  • Page 128 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number Power I/O- 2 or3 SLATCH/ Serial Latch / System Management Bus SMBLCKt Clock: This pin serves as output pin SLATCH when used with the serial interface of Texas Instruments' TPS2202AIDF socket power control chip, and serves as a bidirectional pin SMBCLK when used with Intel's System Management Bus used by Maxim's socket...

  • Page 129: Ambit T62.036.C Dc-Dc Converter

    Ambit T62.036.C DC-DC Converter This T62.036.C DC-DC converter supplies multiple DC(5V, 3,3V, 12V) output to system, and also supplies the battery charge current (0~3.5A). The total inputs from the notebook would be limited by the total output of 65 watts maximum. 2.8.1 Pin Diagram T62.036.C...
  • Page 130 Table 2-8 T62.036.C Pin Descriptions Pin Name Pin Type Pin No. Description source such as docking station power supply. This level is 2 Amps per volt nominal. The source impedance is less than 1K . CHARGSP Analog input from the system board to limit the total current consumed by the system from the AC adapter.

  • Page 131: Ambit Dc-Ac Inverter

    Ambit DC-AC Inverter This notebook uses two kinds of DC-AC inverters: One (T62.088.C) is designed for the 13.3-inch TFT (LG LP133X1) LCD, the other (T62.055.C) for the 12.1-inch TFT (IBM ITSV50D) LCD. 2.9.1 T62.055C 2.9.1.1 Pin Diagram T62.055.C Figure 2-12 T62.055.C Pin Diagram 2.9.1.2 Pin Descriptions...

  • Page 132: T62.088C

    Table 2-9 T62.055.C Pin Descriptions Pin Name Pin Type Pin No. Descriptions BATTLED This signal is an open collector sink signal to drive LED2. The LED current is limited by a series resistor of 1K . BMCVCC This a 5 volt supply for powering the LEDs. It should not be used for any other purpose.
  • Page 133 Table 2-10 T62.088.C Pin Descriptions Pin Name Pin Type Pin No. Descriptions ADVDD This is a 5-volt power line for the analog circuits and display LEDs on the inverter board. MIC_OUT Microphone preamplifier circuit output AUDGND Microphone circuit return ground 4, 5 System ground SGND...
  • Page 134 BIOS Setup Information The computer BIOS setup utility allows you to configure the computer and its hardware settings. The computer comes correctly configured, and you do not need to run the BIOS setup utility to use the computer. However, you might need to use the BIOS utility if you want to customize the way your computer works, or if you receive an error message after making hardware or software changes.

  • Page 135: About My Computer

    About My Computer Selecting About My Computer presents you with two screens of details about the computer and its peripherals. These screens are for information only; you cannot change the settings on these screens. The following table tells you what each of the items on the About My Computer screens are.

  • Page 136: System Configuration

    System Configuration Selecting System Configuration presents a Basic System Configuration screen, where you can change several items in your computer’s configuration. Press to move from one item to another, and to change settings. Press F1 to get help on a selected item. Press Esc to exit the Basic System Configuration screen and return to the main BIOS Utility screen.

  • Page 137: Internal Speaker

    3.2.6 Internal Speaker This parameter lets you enable or disable the internal speaker. The default setting is Enabled. Tip: You can also toggle the speaker on and off by pressing the speaker hot key combination Fn+F7. 3.2.7 Silent Boot When set to Enabled, the computer shows the computer logo onscreen and hides the POST routine messages.

  • Page 138: Advanced System Configuration

    Advanced System Configuration For advanced users, the System Configuration menu item contains two hidden pages that allow you to view and configure more technical aspects of the computer. Caution: The computer is already tuned for optimum performance and you should not need to access these advanced screens.

  • Page 139: Onboard Communication Ports

    Hard Disk 32 Bit Access. This parameter allows your hard disk to use 32-bit access. The available values are: Auto and Disabled. The default setting is Auto. Tip: We suggest you set all of these parameters to Auto whenever that choice is available. This allows the computer to use the hard drive at the highest possible performance level.

  • Page 140: Lid Switch

    Power Saving Options Selecting Power Saving Options on the BIOS Utility main screen presents a screen that allows you to adjust several power-saving settings. 3.4.1 When Lid is Closed The computer’s lid switch acts as its power switch: opening the display wakes up the computer, closing the display puts it to sleep.

  • Page 141: Resume On Schedule

    3.4.5 Resume On Schedule When this parameter is set to Enabled, the computer resumes from suspend-to-memory mode at the specified date and time. Enabling this option overrides the suspend-to-disk function. The Resume Date and Resume Time parameters let you set the date and time for the resume operation.

  • Page 142: System Security

    System Security When you select System Security from the BIOS Utility main screen, a screen appears that allows you to set security options. Important! If a password is currently present, the system prompts you to input the password before entering the System Security screen.

  • Page 143: Diskette Drive Access Control

    3.5.2 Diskette Drive Access Control This parameter allows you to control the read and write functions of the floppy drive. The available options. are: Normal, Write Protect, and Disabled. The default is Normal. With this parameter set to Normal, the floppy drive functions normally. When the parameter is set to Write Protect, all write functions to the floppy drive are disabled, but you can still read from a disk in the floppy drive.

  • Page 144: Reset To Default Settings

    Reset To Default Settings When you select the Reset To Default Settings from the BIOS Utility main screen, a dialog box appears asking you to confirm that you want to reset all settings to their factory defaults. BIOS Setup Information 3-11...

  • Page 145: Chapter 4 Disassembly And Unit Replacement

    Disassembly and Unit Replacement This chapter contains step-by-step procedures on how to disassemble the notebook computer for maintenance and troubleshooting. To disassemble the computer, you need the following tools: Wrist grounding strap and conductive mat for preventing electrostatic discharge Flat-bladed screwdriver Phillips screwdriver Hexagonal screwdriver Tweezers...

  • Page 146: Removing The Battery Pack

    Figure 4-1 Removing the Battery Pack Removing all power sources from the system prevents accidental short circuit during the disassembly process. Service Guide...

  • Page 147: Connector Types

    4.1.2 Connector Types There are two kinds of connectors on the main board: Connectors with no locks Unplug the cable by simply pulling out the cable from the connector. Connectors with locks You can use a plastic stick to lock and unlock connectors with locks. The cables used here are special FPC (flexible printed-circuit) cables, which are more delicate than normal plastic-enclosed cables.

  • Page 148: Disassembly Sequence

    Connectors mentioned in the following procedures are assumed to be no-lock connectors unless specified otherwise. 4.1.3 Disassembly Sequence The disassembly procedure described in this manual is divided into eight major sections: Section 4.2: Removing the module Section 4.3: Replacing the hard disk drive Section 4.4: Replacing memory Section 4.5:...

  • Page 149: Disassembly Flow

    The following diagram details the disassembly flow. Figure 4-3 Disassembly Flow Disassembly and Unit Replacement...

  • Page 150: Removing The Module

    Removing the Module If you are going to disassemble the unit, it is advisable to remove the module first before proceeding. Follow these steps to remove the module: Slide out and hold the module release button. Press the module release latch and slide out the module. Module Release Button Module Release...

  • Page 151: Replacing The Hard Disk Drive

    Replacing the Hard Disk Drive Follow these steps: Turn the computer over to access the base. Remove the two screws from the hard disk drive bay cover and remove the cover. Figure 4-5 Removing the Hard Disk Drive Bay Cover Lift up (1), then pull out the hard disk drive;...

  • Page 152: Replacing Memory

    Replacing Memory The memory slots (SIMM1 and SIMM2) are accessible via the memory door at the base of the unit. Follow these steps to install memory module(s): Turn the computer over to access the base. Remove the screws from the memory door and remove the door. Figure 4-7 Installing a Memory Module Remove the memory module(s) from its shipping container.
  • Page 153 You must run the Sleep Manager utility after installing additional memory in order for the 0V Suspend function to operate in your system. If Sleep Manager is active, it will auto-adjust the partition/file on your notebook for 0V Suspend to function properly. If you are using an operating system other than Windows 95 or DOS, you may need to re-partition your hard disk drive to allow for the additional memory.

  • Page 154: Removing The Keyboard

    Removing the Keyboard Follow these steps to remove the keyboard: Slide out the two display hinge covers on both sides of the notebook. Figure 4-9 Removing the Display Hinge Covers Pull out (first from the edges) and remove the center hinge cover. Figure 4-10 Removing the Center Hinge Cover 4-10...

  • Page 155: Lifting Out The Keyboard

    Lifting out the keyboard takes three steps — (a) lifting up the keyboard, (b) rotating the keyboard to one side, and (c) pulling out the keyboard in the opposite direction. Figure 4-11 Lifting Out the Keyboard Flip the keyboard over and unplug the keyboard connectors (CN4, CN5) to remove the keyboard.

  • Page 156: Replacing The Cpu

    Replacing the CPU Follow these steps to remove the CPU module. Remove six screws that secure the CPU heat sink to the chassis. Figure 4-13 Removing the CPU Heat Sink Remove one screw and pull up the CPU module. (CN8, CN12) When inserting a CPU module, take note of the female and male connectors on the CPU module.

  • Page 157: Removing The Display

    Removing the Display Follow these steps to remove the display module. Remove the two screws that secure the display cable to the motherboard. Then unplug the display cable (CN6). Figure 4-15 Unplugging the Display Cable Remove the four display hinge screws. Detach the display from the main unit and set aside. Figure 4-16 Removing the Display Hinge Screws and Removing the Display Disassembly and Unit Replacement...

  • Page 158: Disassembling The Housing

    Disassembling the Housing This section discusses how to disassemble the housing, and during its course, includes removing and replacing of certain major components like the hard disk drive, memory and the main board. 4.8.1 Detaching the Lower Housing from the Inside Assembly To detach the lower housing from the inside assembly, turn the unit over and remove seven (7) base screws.

  • Page 159: Detaching The Upper Housing From The Inside Assembly

    4.8.2 Detaching the Upper Housing from the Inside Assembly Follow these steps: Remove three screws in the battery bay. Figure 4-18 Removing the Battery Bay Screws Turn the unit back over and remove two screws close to the back part of the unit. Then snap out the upper part of the housing —...

  • Page 160: Removing The Touchpad

    4.8.3 Removing the Touchpad Follow these steps to remove the touchpad: Unplug the touchpad connector (CN5). Pull up and remove the touchpad. Figure 4-20 Removing the Touchpad 4.8.4 Removing the Main Board Follow these steps to remove the main board from the inside assembly. Unplug the speaker connectors (CN17 and CN23), and the battery pack connector (CN21).

  • Page 161: Removing The Main Board

    Remove four screws to remove the main board from the inside assembly. Figure 4-22 Removing the Main Board Remove the charger board (CN19 and CN20) and the multimedia board (CN10 and CN7) from the main board. Figure 4-23 Removing the Charger Board and Multimedia Board Disassembly and Unit Replacement 4-17...

  • Page 162: Removing The Pc Card Slots

    The PC card slot module is usually part of the main board spare part. This removal procedure is for reference only. To remove the PC card slot module, remove two screws. Figure 4-24 Removing the PC Card Slots 4-18 Service Guide...

  • Page 163: Disassembling The Display

    Disassembling the Display Follow these steps to disassemble the display: Remove the teardrop-shaped LCD bumpers at the top of the display and the long bumper on the LCD hinge. Figure 4-25 Removing the LCD Bumpers Remove four screws on the display bezel. Screw list: M2L6 x2 (for 11.3”...

  • Page 164: Removing The Display Bezel

    Pull out and remove the display bezel by pulling on the inside of the bezel sides. Figure 4-27 Removing the Display Bezel Remove the four display panel screws, and unplug the inverter and display panel connectors. Then tilt up and remove the display panel. Screw list: M2.5L6 (bind head) x4 Figure 4-28...

  • Page 165: Removing The Display Cable Assembly

    Remove the two display assembly screws and unplug the display cable connector from the display cable assembly. Then remove the LCD inverter and ID boards. Screw list: M2.5L6 (bind head) x2 LCD Inverter DC-AC inverter Figure 4-29 Removing the Display Cable Assembly Disassembly and Unit Replacement 4-21...

  • Page 166: Model Number Definition

    Model Number Definition This appendix shows the model number definition of the notebook. TravelMate 7300 VU - W X Y Z Z: Acer or TI logo TI logo Blank: Acer logo Y: Keyboard language version Swiss for ANW with US power cord...
  • Page 167 w/o HDD, FDD, CD-ROM 2.0GB HDD + FDD + CD-ROM 3.0GB HDD + FDD + CD-ROM 4.0GB HDD + FDD + CD-ROM VU: LCD size 12.1” TFT LCD TE: 13.3” TFT LCD Service Guide...

  • Page 168: Exploded View Diagram List

    Exploded View Diagram This appendix includes exploded view diagrams of the notebook. Table B-1 Exploded View Diagram List Description System assembly 13.3-inch LCD Module assembly Exploded View Diagram...

  • Page 171: Spare Parts List

    Acer part no. Comment/location Min. Qty LCD Module ASSY LCD (13.3") 3700 6M.44B05.001 65.42A01.011 INVERTER T62.088.C.00 970TE 19.21030.151 PLT LOGO 7100TE(7300 ACER) 40.46805.151 FOR ACER 7300 HINGE 6M.44B04.001 34.42A13.001+34.42A14.001 ASSY PANEL LCD 13.3” 970T 60.42A13.001 ASSY BEZEL LCD 13.3” 970T 60.42A14.001...
  • Page 172 Table C-1 Spare Parts List Level Description Acer part no. Comment/location Min. Qty CD-ROM ASSY CD-ROM MODULE (14X) 7300 6M.44B01.001 65.42A01.001 C.A FPC CD-ROM 14X 970T 50.42A03.001 ASSY CD-ROM 14X BZL 970T 60.42A05.001 ASSY FDD MODELE 7300 6M.44B02.001 65.46802.001 CABLE ASSY FDD 52P 970 50.46802.001...

  • Page 173: Schematics Diagram List

    Schematics This appendix includes the schematic diagrams of the notebook. Table D-1 Schematics Diagram List Page Description System Board Index Page Revision History Clock Generator MMO Module Connector PIIX4 A PIIX4 B Pull-Up&Down Resistors D-10 DRAM Data Terminator D-11 SDDIMM Sockets D-12 Super IO Controller D-13...
  • Page 174 Table D-1 Schematics Diagram List Page Description D-34 PCMCIA Controller D-35 PCMCIA Sockets D-36 PCMCIA Socket Power and Interrupt Control D-37 System / Media Board Connector D-38 Internal Keyboard and Touchpad Connector D-39 CRT & LCD Controller D-40 LCD Interface Logics D-41 Isolation Logic and Spare Parts Service Guide...
  • Page 175 Schematics...
  • Page 176 Service Guide...
  • Page 177 Schematics...
  • Page 178 Service Guide...
  • Page 179 Schematics...
  • Page 180 Service Guide...
  • Page 181 Schematics...
  • Page 182 D-10 Service Guide...
  • Page 183 Schematics D-11...
  • Page 184 D-12 Service Guide...
  • Page 185 Schematics D-13...
  • Page 186 D-14 Service Guide...
  • Page 187 Schematics D-15...
  • Page 188 D-16 Service Guide...
  • Page 189 Schematics D-17...
  • Page 190 D-18 Service Guide...
  • Page 191 Schematics D-19...
  • Page 192 D-20 Service Guide...
  • Page 193 Schematics D-21...
  • Page 194 D-22 Service Guide...
  • Page 195 Schematics D-23...
  • Page 196 D-24 Service Guide...
  • Page 197 Schematics D-25...
  • Page 198 D-26 Service Guide...
  • Page 199 Schematics D-27...
  • Page 200 D-28 Service Guide...
  • Page 201 Schematics D-29...
  • Page 202 D-30 Service Guide...
  • Page 203 Schematics D-31...
  • Page 204 D-32 Service Guide...
  • Page 205 Schematics D-33...
  • Page 206 D-34 Service Guide...
  • Page 207 Schematics D-35...
  • Page 208 D-36 Service Guide...
  • Page 209 Schematics D-37...
  • Page 210 D-38 Service Guide...
  • Page 211 Schematics D-39...
  • Page 212 D-40 Service Guide...
  • Page 213 Schematics D-41...

  • Page 214: Post Checkpoint List

    BIOS POST Checkpoints This appendix lists the POST checkpoints of the notebook BIOS. Table E-1 POST Checkpoint List Checkpoint Description Determines if the current booting procedure is from cold boot (press reset button or turn the system on), from warm boot (press Ctrl +Alt +Del). Note: At the beginning of POST, port 64 bit 2 (8042 system flag) is read to determine whether this POST is caused by a cold or warm boot.
  • Page 215 Note: If system has any display card, here it should be initialized via its I/O ROM or corresponding initialization program. VGA BIOS POST. Enables video shadow RAM Displays Acer (or OEM) logo (if necessary) Displays Acer copyright message (if necessary) Displays BIOS serial number Memory testing...
  • Page 216 Table E-1 POST Checkpoint List Checkpoint Description Serial port testing Math coprocessor testing Reset pointing device Set security status KB device initialization Set KB led upon setup requests Enable KB device Issue 2nd software SMI to communicate with PMU Enable the use of BIOS Setup, system information. and fuel gauge Tests and initializes FDD Note: The FDD LED should flash once and its head should be positioned.
  • Page 217 Service Guide...

Table of Contents