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Table 2-5
87C552 Pin Descriptions
Mnemonic
Pin No.
P4.0-P4.7
7-14
7-12
13, 14
P5.0-P5.7
68-62,
1
RST
15
XTAL1
35
XTAL2
34
V
36, 37
SS
PSEN#
47
ALE/PROG#
48
EA#/V
49
PP
AV
58
REF–
AV
59
REF+
AV
60
SS
AV
61
DD
Major Chips Description
Type
I/O
Port 4: 8-bit quasi-bidirectional I/O port. Alternate functions include:
O
CMSR0-CMSR5 (P4.0-P4.5): Timer T2 compare and set/reset outputs
on a match with timer T2. 13, 14
O
CMT0, CMT1 (P4.6, P4.7): Timer T2 compare and toggle outputs on a
match with timer T2.
I
Port 5: 8-bit input port.
ADC0-ADC7 (P5.0-P5.7): Alternate function: Eight input channels to
ADC.
I/O
Reset: Input to reset the 87C552. It also provides a reset pulse as
output when timer T3 overflows.
I
Crystal Input 1: Input to the inverting amplifier that forms the oscillator,
and input to the internal clock generator. Receives the external clock
signal when an external oscillator is used.
O
Crystal Input 2: Output of the inverting amplifier that forms the
oscillator. Left open-circuit when an external clock is used.
I
Digital ground.
O
Program Store Enable: Active-low read strobe to external program
memory.
O
Address Latch Enable: Latches the low byte of the address during
accesses to external memory. It is activated every six oscillator
periods. During an external data memory access, one ALE pulse is
skipped. ALE can drive up to eight LS TTL inputs and handles CMOS
inputs without an external pull-up. This pin is also the program pulse
input (PROG#) during EPROM programming.
I
External Access: When EA# is held at TTL level high, the CPU
executes out of the internal program ROM provided the program
counter is less than 8192. When EA# is held at TTL low level, the CPU
executes out of external program memory. EA# is not allowed to float.
This pin also receives the 12.75V programming supply voltage (V
during EPROM programming.
I
Analog to Digital Conversion Reference Resistor: Low-end.
I
Analog to Digital Conversion Reference Resistor: High-end.
I
Analog Ground
I
Analog Power Supply
Name And Function
)
PP
2-47
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