Memory Subsystem; Figure 11. Cek Processor Mounting - Intel S5000XVNSATA Specification

Functional Architecture Intel® Workstation Board S5000XVN TPS

Figure 11. CEK Processor Mounting

3.1.3

Memory Subsystem

The MCH supports four fully buffered DIMM (FBD) memory channels. FBD memory uses a
narrow, high–speed, frame-oriented interface referred to as a channel. The four FBD channels
are organized into two branches of two channels per branch. Each branch is supported by a
separate memory controller. The two channels on each branch operate in lock-step to increase
FBD bandwidth. The four channels are routed to eight DIMM sockets and are capable of
supporting registered DDR2-533 and DDR2-667 FBDIMM memory (stacked or unstacked).
Peak theoretical memory data bandwidth is 6.4GB/s with DDR2-533 and 8.0GB/s with DDR2-
667.
®
On the Intel Workstation Board S5000XVN, a pair of channels becomes a branch where
Branch 0 consists of channels A and B, and Branch 1 consists of channels C and D. FBD
memory channels are organized into two branches for support of RAID 1 (mirroring).
16 Revision 1.5
Intel order number: D66403-006