Intel 6 SERIES CHIPSET - SPECIFICATION UPDATE 01-2011 Specification page 13

Errata
3. USB Babble Detected with SW Overscheduling
Problem: If software violates USB periodic scheduling rules for Full-Speed isochronous traffic by
overscheduling, the RM H may not handl e th e error condition properly and return a
completion split with more data than the length expected.
Implication: If the RMH returns more data than expected, the endpoint will detect packet babble for
that tr ansaction and the pac ket will be dropp ed. Since ov erscheduling occurred to
create the error condition, the packet would be dropped regardless of RMH behavior. If
a single isochronous data p acket is lost, no p erceptible imp act to the end
expected.
Note:
USB software overscheduling occurs when the amount of data scheduled for a
microframe exceeds the maximum budget. This is an error condition that violates the
USB periodic scheduling rule.
Note: This failure has only been recreated synthetically with USB software intentionally
overscheduling traffic to hit the error condition.
Workaround: None.
Status: No Plan to Fix.
4. USB Low-Speed/Full-Speed EOP Issue
Problem: If the EOP of the last packet in a USB Isochronous split transaction (Transaction >189
bytes) is dropped or delayed 3 ms or longer the following may occur:
• If there are no other pending Low-Speed or Full-speed transactions the RMH will
not send SOF, or Keep-Alive. Devices connected to the RMH will interpret this
condition as idle and will enter suspend.
• If there is other pending Low-Speed or Full-Speed transactions, the RMH will drop
the isochronous transaction and resume normal operation.
Implication:
• If there are no other transactions pending, the RMH is unaware a device entered
suspend and may starting sending a transaction without waking the device. The
implication is device dependent, but a device may stall and require a reset to
resume functionality.
• If there are other transactions present, only the initial isochronous transaction may
be lost. The loss of a single isochronous transaction may not result in end user
perceptible impact.
Note: Intel has only observed this failure when using software that does not comply with the
USB specification and violates the hardware isochronous scheduling threshold by
terminating transactions that are already in progress
Workaround: None.
Status: No Plan to Fix.
5. USB PLL Control FSM not Getting Reset on Global Reset
®
Problem: Intel 6 Se ries Chipset USB PLL ma y not lock if a Global R eset occurs early during a
cold boot sequence.
Implication: USB interface would no t be fu nctional an additional cold bo ot would be necessary to
recover.
Workaround: None.
Status: No Plan to Fix.
Specification Update
user is
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