Texas Instruments DS560DF810 User Manual

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EVM User's Guide: DS560DF810
DS560DF810 EVM User's Guide
The DS560DF810 evaluation board module (EVM) allows the user to quickly evaluate both the high-speed and
low-speed functionality of the DS560DF810 retimer. The DS560DF810 is an 8-channel multi-rate retimer with
integrated signal conditioning. It supports retimed operation for PAM4 and NRZ data rates from 19.6 to 28.9
GBd. Integrated physical AC coupling capacitors (both TX and RX) eliminate the need for external capacitors on
the PCB. The DS560DF810 relies on two power supply voltages, 1.2 V and 1.8 V, managed on the EVM through
an onboard power tree.
The advanced equalization features of the DS560DF810 include a low-jitter 4-tap transmit finite impulse
response (FIR) filter, as well as receive adaptive continuous-time linear equalizer (CTLE), decision feedback
equalizer (DFE) and feed forward equalizer. This comprehensive equalization enables reach extension for lossy
interconnects and backplanes with multiple connectors as well as crosstalk. The integrated CDR function is ideal
for front-port optical module applications to reset the jitter budget and retime the high-speed serial data. The
DS560DF810 implements a 2×2 cross-point on each channel pair, providing the host with both lanes crossing
and fanout options.
The DS560DF810 can be configured through its default I2C two-wire serial target mode, or it can configure itself
from an external EEPROM through its controller mode. On-chip eye monitor and PRBS generator and checker
functions allow for comprehensive in-system diagnostics.
1 Hardware Description and Setup..........................................................................................................................................
1.1 Required Hardware............................................................................................................................................................
1.2 General Hardware Test Setup Procedure..........................................................................................................................
1.3 Hardware Configuration to use Onboard 25 MHz Oscillator for CAL_CLK_IN..................................................................
2 Software Description..............................................................................................................................................................5
2.1 Software Installation Sequence..........................................................................................................................................5
2.2 Latte Functional Overview..................................................................................................................................................7
2.3 Useful Latte Short-Cuts......................................................................................................................................................8
2.4 DS560DF810EVM Initialization Through the Latte GUI.....................................................................................................
3 Test Case Examples.............................................................................................................................................................
3.1 Transmitter Test Case - EVM Board Output Evaluation for 26.5625 GBd PAM4
3.2 Receiver Test Case - High Loss Input Channel to Retimer EVM, 26.5625 GBd
4 Supplemental Documents....................................................................................................................................................16
5 EVM Cable Assemblies........................................................................................................................................................
6 Revision History...................................................................................................................................................................
Figure 1-1. DS560DF810EVM Power, Low-Speed Communication, and High-Speed Signaling Connections
Figure 1-2. DS560DF810EVM Power Tree
Figure 1-3. DS560DF810EVM Schematic Portion for CAL_CLK_IN Input Circuit; Applies to EVM Version Rev 2
and Later ................................................................................................................................................................................
Figure 2-1. Latte Installer Window to Start Process
Figure 2-2. Latte Installer Window to Select the Destination Folder ....................................................................................
Figure 2-3. Latte Installation Window Prior to Launch of "Install" .......................................................................................
Figure 2-4. Latte GUI Overview ................................................................................................................................................
Figure 2-5. Latte GUI Snapshot Showing the User Configurable Retimer Parameters from the
"1_bringupParams.py" Script
Figure 2-6. Example Latte GUI Log Window Snapshot Showing ROM Patch Load and Channel Initialization
SNLU293A - DECEMBER 2022 - REVISED DECEMBER 2022
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Copyright © 2022 Texas Instruments Incorporated
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