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Texas Instruments LMK61PDEVM User Manual
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Texas Instruments LMK61PDEVM User Manual

Texas Instruments LMK61PDEVM User Manual

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LMK61PDEVM
User's Guide
Literature Number: SNAU193A
November 2015 – Revised November 2015

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Summary of Contents for Texas Instruments LMK61PDEVM

  • Page 1 LMK61PDEVM User's Guide Literature Number: SNAU193A November 2015 – Revised November 2015...
  • Page 2 Table 1. Ordering Information EVM ID DEVICE ID DEVICE PACKAGE LMK61PDEVM (SV601249A-001) LMK61PD0A2-SIA 5 mm x 7 mm 8-pin QFM (SIA) LMK61PDEVM User's Guide SNAU193A – November 2015 – Revised November 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 3 (LVPECL, LVDS, or HCSL), and integrated LDOs. The LMK61PDEVM can be used as a flexible clock source for compliance testing, performance evaluation, and initial system prototyping. The onboard edge-launch SMA ports provides access to the LMK61PD0A2’s configurable clock output for interfacing to test equipment and reference boards using...
  • Page 4 SMA ports shown in Figure 2. Additionally, the USB port can be used to power the entire LMK61PDEVM without the need for external power supplies. These SMA ports are labeled in the top silkscreen layer. Figure 2. LMK61PDEVM Board Layout LMK61PDEVM User's Guide SNAU193A –...
  • Page 5 NOTE: Power delivery over the USB interface is subject to limitations of specific USB ports. Certain systems may require the use of an external supplied power source for proper operation. SNAU193A – November 2015 – Revised November 2015 LMK61PDEVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...

  • Page 6: Operating Mode

    Output Disabled (PLL functional) Output Enabled Output Type Select The state of OS controls device output format. Output Format LVPECL LVDS HCSL LMK61PDEVM User's Guide SNAU193A – November 2015 – Revised November 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 7 R2, R7, R5 50 ohm to Vcc-2 V termination is required on receiver. 100 ohm differential termination (R5) is provided on the LMK61PDEVM. Removing the differential termination on the EVM is possible if the differential termination is available on the receiver.
  • Page 8 EVM Quick Start Guide The following guide allows the user to quickly configure the LMK61PDEVM to evaluate performance and device flexibility. 1. Set the Output Frequency Select Pins (FS0 and FS1) to the desired output frequency as noted in Table 2.
  • Page 9 FS[1:0] = NC, NC, OS = NC Figure 8. Phase Noise of LVPECL Differential Output at 156.25 MHz with FS[1:0] = NC, NC, OS = GND SNAU193A – November 2015 – Revised November 2015 LMK61PDEVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 10 EVM Design www.ti.com EVM Design EVM Layout Figure 9. Top Overlay Figure 10. Top Solder Mask LMK61PDEVM User's Guide SNAU193A – November 2015 – Revised November 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 11 EVM Design www.ti.com Figure 11. Layer 1 (Top Side) Figure 12. Layer 4 (Bottom Side, View From Bottom) SNAU193A – November 2015 – Revised November 2015 LMK61PDEVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 12 EVM Design www.ti.com Figure 13. Bottom Solder Mask Figure 14. Drill Drawing LMK61PDEVM User's Guide SNAU193A – November 2015 – Revised November 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 13 EVM Design www.ti.com Figure 15. Board Dimensions SNAU193A – November 2015 – Revised November 2015 LMK61PDEVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 14 Default Shunt settings: SH5_2_3 means short Pins 2-3 of J5 jumper. ZZ10 Assembly Note Default Shunt settings: SH6_1_2 means short Pins 1-2 of J6 jumper. LMK61PDEVM User's Guide SNAU193A – November 2015 – Revised November 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 15 2 = <JP NAME> 3 = VDD 3 = VDD 4 = U2A 1.5k 4 = U2A 1.5k 1.5k 1.5k SH5_2_3 SH6_1_2 SNAU193A – November 2015 – Revised November 2015 LMK61PDEVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 16 ULTRA LOW-NOISE, 250-mA Texas Instruments LP5907MFX-3.3/NOPB LINEAR REGULATOR FOR RF AND ANALOG CIRCUITS REQUIRES NO BYPASS CAPACITOR, DBV0005A Ultra-Low Jitter Pin Programmable Texas Instruments LMK61PD0A2-SIAT Oscillator, SIA0008B R2, R7 RES, 0 ohm, 5%, 0.1W, 0603 Vishay-Dale CRCW06030000Z0EA LMK61PDEVM User's Guide SNAU193A –...
  • Page 17 Page ........................• Production Data release NOTE: Page numbers for previous revisions may differ from page numbers in the current version. SNAU193A – November 2015 – Revised November 2015 Revision History Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 18 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
  • Page 19 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 20 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
  • Page 21 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated...

  • Page 22: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
  • Page 23 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments LMK61PDEVM...

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