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LMK61E2EVM
User's Guide
Literature Number: SNAU188
October 2015

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Summary of Contents for Texas Instruments LMK61E2EVM

  • Page 1 LMK61E2EVM User's Guide Literature Number: SNAU188 October 2015...
  • Page 2: Table Of Contents

    ......................EVM Quick Start Guide ..................Recommended Test Instruments ................... Example Performance Measurements ........................EVM Layout ........................EVM Schematic ......................EVM Bill of Materials Table of Contents SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 3 ......................Ordering Information ....................... Power Configurations ....................... Control Pin Interfaces ..................... Output Termination Schemes .................. Recommended Device Configurations ..................Typical Output RMS Jitter Summary SNAU188 – October 2015 List of Figures Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 4: Lmk61E2Evm Photo

    Figure 1. LMK61E2EVM Photo Table 1. Ordering Information EVM ID DEVICE ID DEVICE PACKAGE LMK61E2EVM LMK61E2-SIA 5 mm x 7 mm 8-pin QFM (SIA) LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 5: Overview

    50 MHz crystal, low noise PLL, differential output, and integrated EEPROM. The LMK61E2EVM can be used as a flexible clock source for compliance testing, performance evaluation, and initial system prototyping. The onboard edge-launch SMA ports provides access to the LMK61E2’s configurable clock output for interfacing to test equipment and reference boards using commercially available coaxial cables, adapters, or baluns (not included).
  • Page 6: Configuring The Evm

    LMK61E2EVM. When operating the LMK61E2EVM, the power supply and clock outputs can be connected to the SMA ports shown in Figure 2. Additionally, the USB port can be used to power the entire LMK61E2EVM without the need for external power supplies. These SMA ports are labeled in the top silkscreen layer.
  • Page 7: Power Terminals And Jumpers

    Markings left of J2 indicate the orientation of jumper settings EXT PWR (pins 1 and 2 of jumper) and USB PWR / REG (pins 2 and 3 of jumper) USB cable must be connected to J1 for operation SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 8: Configuring The Control Pins

    The LMK61E2 control pins serve several functions unique to device pins. For a description of each pin’s functionality and the device configuration based on their power up state, refer to Table 3. LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 9 Pin 4: N/C Pin 3: N/C Pin 5: GND Pin 6: N/C Pin 7: OE Pin 8: ADD Pin 9: N/C Pin 10: N/C SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 10: Configuring The Clock Output

    R27, R30, R31 50 ohm to Vcc-2 V termination is required on receiver. 100 ohm differential termination (R31) is provided on the LMK61E2EVM. Removing the differential termination on the EVM is possible if the differential termination is available on the receiver.
  • Page 11: Using The Usb Interface Connection

    Oscilloscope: Agilent DSA90000A series (or equivalent) for AC measurements and time-domain jitter analysis with jitter software package • Balun: M/A-COM H-183-4 (30-3000 MHz) 180° coupler, or equivalent SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 12: Example Performance Measurements

    HCSL Figure 8 All measurements are AC coupled with recommended board terminations as in Table 4. Figure 6. 156.25 MHz LVPECL Differential Phase Noise LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 13 Example Performance Measurements www.ti.com Figure 7. 156.25 MHz LVDS Differential Phase Noise SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 14 Example Performance Measurements www.ti.com Figure 8. 161.1328125 MHz HCSL Differential Phase Noise LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 15: Evm Layout

    EVM Layout www.ti.com EVM Layout Figure 9. Top Overlay Figure 10. Top Solder Mask Figure 11. Layer 1 (Top Side) SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 16: Bottom Solder Mask

    EVM Layout www.ti.com Figure 12. Layer 4 (Bottom Side, View From Bottom) Figure 13. Bottom Solder Mask Figure 14. Bottom Overlay LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 17: Drill Drawing

    EVM Layout www.ti.com Figure 15. Drill Drawing SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 18: Evm Schematic

    Default Shunt settings: SH5_2-3 means short Pins 2-3 of J9 jumper. For 3-way jumpers, Pin 4 is the 1-pin header. ZZ10 Assembly Note Default Shunt settings: SH6_2-3 means short Pins 2-3 of J10 jumper. For 3-way jumpers, Pin 4 is the 1-pin header. LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 19 DVCC1 DVSS1 - ADCs 0-4 DVCC2 DVSS2 - DACs 0-1 - PWMs 0-3 MSP430F5529IPN SH3_2_3 - SPI interface (I2C/SMBus only) SH4_2_3 0.1µF 0.1µF 0.1µF SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 20 4.7k OUTP OUTN OUT_N R_OUT_N 0.1µF LAYOUT NOTE: LAYOUT NOTE: OUTN LMK06001SIA Individual vias to Place close to SMA GND on shunt ports. resistors. LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 21: Evm Bill Of Materials

    RES, 4.7 k, 5%, 0.1 W, 0603 Vishay-Dale CRCW06034K70JNEA R26, R29 RES, 150, 5%, 0.1 W, 0603 Vishay-Dale CRCW0603150RJNEA RES, 100, 1%, 0.1 W, 0603 Vishay-Dale CRCW0603100RFKEA SNAU188 – October 2015 LMK61E2EVM User's Guide Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 22 SON (DRY), Green (RoHS & no Sb/Br) Mixed Signal MicroController, Texas Instruments MSP430F5529IPN PN0080A LMK61E2SIA, SIA0008B Texas Instruments LMK61E2-SIA Crystal, 24.000MHz, 20pF, SMD ECS Inc. ECS-240-20-5PX-TR LMK61E2EVM User's Guide SNAU188 – October 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 23 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
  • Page 24 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 25 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
  • Page 26 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated...
  • Page 27 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
  • Page 28 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments LMK61E2EVM...

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