JYTEK JY-5320 Series Specification

Simultaneous data acquisition modules

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1 USB/PCIe/PXIe-5321,5322,5323,5324 Specification

Family of Simultaneous Data Acquisition Modules

 Please download JYTEK <JYPEDIA>, you can quickly

inquire the product prices, the key features and

available accessories.

1.1 Main Features

⚫

High accuracy: 380 ppm

⚫

32 (JY-5321, JY-5323) / 16 (JY-5322, JY-5324)

simultaneous voltage measurement channels

⚫

1 MS/s per channel( JY-5321 JY-5322)

⚫

200 KS/s per channel (JY-5323JY-5324)

⚫

16 bits resolution

⚫

Up to 220 KHz bandwidth

⚫

Better than -90dB THD

Overview

USB/PCIe/PXIe-5321,5322,5323,5324 is

a high-precision, high-resolution, up to

32-channel

simultaneous

measurement module. It can be used to

measure the DC voltage, the AC voltage

as well as many dynamic signals.

Depending on the model number, a JY-

5321/5322/5323/5324 series provide

different AI channels, sampling rate.

⚫

System noise as low as 7µVrms

⚫

Up to 8µV resolution

⚫

Voltage ranges:

±0.25V/±0.5V/±1V/±2V/±5V/±10V

JY-

(

5321,

5322)

⚫

±0.5V/±1V/±5V/±10V (JY-5323,JY-5324)

⚫

240M samples of FIFO buffer

⚫

Analog and Digital Trigger

JY-5320 Series V1.0.2 |

voltage

jytek.com

| 1

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Summary of Contents for JYTEK JY-5320 Series

Page 1: Usb/Pcie/Pxie-5321,5322,5323,5324 Specification
Depending on the model number, a JY- 5321/5322/5323/5324 series provide different AI channels, sampling rate.  Please download JYTEK <JYPEDIA>, you can quickly inquire the product prices, the key features and available accessories. 1.1 Main Features ⚫...
Page 2: Analog Input Specifications
220 kHz (220 kHz Bandwidth) -27 V ~ +27 V Overvoltage protection Input current during ≤6 mA overvoltage protection *1 ±1 V Range Typical Test *2 ±10 V Range Typical Test Table 1 Analog Input Specifications JY-5320 Series V1.0.2 | jytek.com...
Page 3: Digital Io Specifications
It should be noted when the reading is close to zero, the gain error is very small and negligible, the offset error is dominant; when the reading is getting close to the full range, the gain error becomes more significant. 1.5.1 Basic JY-5321/5322/5323/5324 DC Accuracy The Basic DC Accuracy of JY-5321/JY-5322 . JY-5320 Series V1.0.2 | jytek.com...
Page 4: System Noise
Table 6 System Noise of JY-5322 1.5.3 Temperature Drift Adjustment If JY-5324 operates outside the calibration temperature range, typically Tcal±5°C, the accuracy must be adjusted by Table 7. The entries are per degree C. For example, if the JY-5320 Series V1.0.2 | jytek.com...
Page 5: Example Of Calculating Gain And Offset Errors
JY-5324. When Table 8 reading 2mV, the total gain error is 0.12 μV, the offset error is 10 uV, and the total error is 10.12 uV JY-5320 Series V1.0.2 | jytek.com...
Page 6: Ac Accuracy (Tbd)
-103 -103 JY-5321 JY-5322 support 2 Bandwidth: 220 KHz and 25 KHz, this table shows specification under 25 KHz Table 9 Dynamic Performance of JY-5321/JY-5322 Table 10 shows JY-5323/JY-5324 Dynamic performance including AI Bandwidth, THD, JY-5320 Series V1.0.2 | jytek.com...
Page 7: Ai Bandwidth
SINAD, SFDR and Noise. Table 10 Dynamic Performance of JY-5323/JY-5324 1.7.1 AI Bandwidth Figure 1 -3dB Bandwidth (25 KHz) JY-5320 Series V1.0.2 | jytek.com...
Page 8: Cmrr
Figure 2 -3dB Bandwidth (220 KHz) 1.7.2 CMRR Figure 3 CMRR JY-5320 Series V1.0.2 | jytek.com...
Page 9: Crosstalk
Table 11 CMRR 1.7.3 Crosstalk Adjacent channel Range(V) Crosstalk(dB at 10 kHz) -110 -109 -110 -110 -110 0.5V -110 0.25V JY5321 support 2 Bandwidth: 220 KHz and 25 KHz, this table shows specification under 25 KHz JY-5320 Series V1.0.2 | jytek.com...
Page 10 JY5321 support 2 Bandwidth: 220 KHz and 25 KHz, this table shows specification under 220 KHz Range(V) Crosstalk(dB at 10 kHz) -120 -115 -102 0.5V This table shows specification of JY5320 Table 12 Crosstalk (Adjacent channel) JY-5320 Series V1.0.2 | jytek.com | 10...
Page 11: Cio
Non-adjacent channel Range(V) Crosstalk(dB at 10 kHz) -128 -127 -127 -126 Table 13 Crosstalk (Non-adjacent channel) 1.8 CIO Table 14 CIO Specifications JY-5320 Series V1.0.2 | jytek.com | 11...
Page 12: Connector
33 AI_GND 67 AI_GND 34 AI 31- 68 AI 31+ 34 AI 15- 68 AI 15+ Connector 1 Connector 0 Signal Name Signal Name CTR1_Source/A CTR0_Source/A CTR1_Gate/Z CTR0_Gate/Z CTR1_AUX/B CTR0_AUX/B CTR1_ OUT CTR0_ OUT JY-5320 Series V1.0.2 | jytek.com | 12...
Page 13: Jy-5322/Jy-5324 Provides 16 Channels
63 AI 12+ 30 AI_GND 64 AI_GND 31 AI 13- 65 AI 13+ 32 AI 14- 66 AI 14+ 33 AI_GND 67 AI_GND 34 AI 15- 68 AI 15+ Table 16 Pinout definition of JY-5322/JY-5324 JY-5320 Series V1.0.2 | jytek.com | 13...
Page 14: Front Panel Connections And Pinout Definition
1.11 Physical and Environment PXIe standard x4 PXI Express peripheral module Specification V1.0 compliant Slot supported x1 and x4 PXI Express or PXI Express hybrid slots Size External physical size 3 U PXIe Weight 190 g JY-5320 Series V1.0.2 | jytek.com | 14...
Page 15 Table 17 Physical and Environment JY-5320 Series V1.0.2 | jytek.com | 15...
Page 16: Table Of Contents
1.9.1 JY-5321/JY5323 provides 32 channels ..............12 1.9.2 JY-5322/JY-5324 provides 16 channels ............... 13 1.10 Front Panel connections and Pinout Definition ........... 14 1.11 Physical and Environment ..................14 2 Table of Contents ...................... 16 JY-5320 Series V1.0.2 | jytek.com | 16...
Page 17 3.3 C# Programming Language ..................24 3.4 C ++ Programming Language ................. 24 3.5 JY-5321/5322/5323/5324 Hardware Driver ............24 3.6 Install the SeeSharpTools from JYTEK ..............24 3.7 Running C# Programs in Linux ................25 4 Order Information ..................... 26 5 JYPEDIA ........................
Page 18 8.10 DIP Switch in PCIe-5320 ..................83 9 Calibration ......................... 84 10 Appendix ......................... 84 10.1 Typical Measurement Error.................. 84 10.2 System Noise ......................85 10.3 Temperature Drift ....................85 11 About JYTEK ......................85 JY-5320 Series V1.0.2 | jytek.com | 18...
Page 19 11.1 JYTEK China ......................85 11.2 JYTEK Software Platform ..................86 11.3 JYTEK Warranty and Support Services ..............86 12 Statement ........................ 87 Table 1 Analog Input Specifications ............... 2 Table 2 DIO Specifications ..................3 Table 3 PFI Specifications ..................3 Table 4 AI Accuracy of JY-5321/JY-5322 ..............
Page 20 Figure 23 External Digital Trigger ................. 41 Figure 24 Digital Trigger Acquisition ..............42 Figure 25 Start Trigger ..................43 Figure 26 Reference Trigger ................. 44 Figure 27 Re-Trigger ..................... 44 Figure 28 Retrigger Paraments................45 JY-5320 Series V1.0.2 | jytek.com | 20...
Page 21 Figure 53 Two-Edge Seperation with Implicit Sample Clock ........ 66 Figure 54 Two-EdgeSeparation Measure For Single Mode ........67 Figure 55 Two-EdgeSeparation Measure For Finite Mode ........68 Figure 56 Quadrature Endcoder x1 Mode ............68 JY-5320 Series V1.0.2 | jytek.com | 21...
Page 22 Figure 75 AI Acquisition Finite Pulse ..............81 Figure 76 Continuous Pulse Generation .............. 81 Figure 77 AI Acquisition Continuous Pulse ............82 Figure 78 SSI Connector in PCIe-5320 ..............83 Figure 79 DIP Switch in PCIe-5310 ............... 83 JY-5320 Series V1.0.2 | jytek.com | 22...
Page 23: Software
Windows 10 whenever possible. Linux Kernel Versions: There are many Linux versions. It is not possible JYTEK can support and test our devices under all different Linux versions. JYTEK will at the best support the following Linux versions.
Page 24: C# Programming Language
C# is also a cross platform programming language. 3.4 C ++ Programming Language JYTEK provides QT C++ drivers for C++ programmers. We also provide many QT C++ examples. However, due to our limited resources, we do not support C++ based applications.
Page 25: Running C# Programs In Linux
If you want to use your own Linux development system other than Mono, you can do it using our Linux driver. However, JYTEK does not have the capability to support the Linux applications. JYTEK completely relies upon Microsoft to maintain the cross- platform compatibility between Windows and Linux using Mono.
Page 26: Order Information
16-ch, 16-bit, 1MS/s/ch , 8 DIO, USB Simultaneous sampling Multifunction I/O Module  USB-5323 (PN: JY1743328-01) 32-ch, 16-bit, 200kS/s/ch , 16 DIO, USB Simultaneous sampling Multifunction I/O Module  USB-5324 (PN: JY9890308-01) 16-ch, 16-bit, 200kS/s/ch , 8 DIO, USB Simultaneous sampling Multifunction I/O Module JY-5320 Series V1.0.2 | jytek.com | 26...
Page 27: Jypedia
Windows 10 whenever possible. Linux Kernel Versions: There are many Linux versions. It is not possible JYTEK can support and test our devices under all different Linux versions. JYTEK will at the best JY-5320 Series V1.0.2 | jytek.com...
Page 28: System Software
C# is also a cross platform programming language. 7.4 C ++ Programming Language JYTEK provides QT C++ drivers for C++ programmers. We also provide many QT C++ examples. However, due to our limited resources, we do not support C++ based applications.
Page 29: Python
7.5 Python JYTEK provides and supports a native python driver for JY-5321/5322/5323/5324 cards. There are many different versions of Python. JYTEK has only tested in CPython version 3.5. There is no guarantee that JYTEK python drivers will work correctly with other versions of Python.
Page 30: Continuous Acquisition
You use the sample program Analog Input --> Winform AI Continuous to learn more about Continuous Acquisition Learn by Example 8.2.1 You use the sample program Analog Input --> Winform AI Continuous to learn more JY-5320 Series V1.0.2 | jytek.com | 30...
Page 31 Connect the one signal source’s positive outputs to JY-5323 AI Ch2 (AI2+, Pin #48), one negative terminals to AI Ch2 negative (AI2-, Pin#14) . ◼ Set other numbers as shown and click start. Figure 6 Set other numbers Figure 7 AI Continuous Data JY-5320 Series V1.0.2 | jytek.com | 31...
Page 32: Finite Acquisition
AI Ch2(AI2+,Pin#48),two negative terminals to AI Ch1 negative (AI1-,Pin#13),and AI Ch2 negative (AI2-mPin#14) . ◼ Set two sinewave signals(f=50 Hz,Vpp=8 V;f=50 Hz,vpp=5 V). ◼ Click Strat to run the task. Figure 8 Streaming JY-5320 Series V1.0.2 | jytek.com | 32...
Page 33: Analog Input Terminal Type
As a rule of thumb, R should be 1000 times of the signal source output impedance, roughly 10 KΩ to 100 KΩ. At this level, R has very little impact on the measurement. Figure 10 Differential Mode for Floating Signal JY-5320 Series V1.0.2 | jytek.com | 33...
Page 34: Trigger Source
8.4.1 Immediate trigger The module will acquire the signal immediately after executing the AI Task without any trigger condition setting by default. Learn by Example 8.4.1 Figure 11 Immediate trigger Paraments JY-5320 Series V1.0.2 | jytek.com | 34...
Page 35: Software Trigger
➢ Data will not be acquired until there is a positive signal from Software Trigger when Send Soft Trigger is clicked. ◼ After sending the trigger signal, the result will be like this: JY-5320 Series V1.0.2 | jytek.com | 35...
Page 36: External Analog Trigger
"Falling Slope Trigger": The Edge comparator will output high when the signal go below the threshold. And it will change to low when the signal goes above the threshold as shown in Figure 15. JY-5320 Series V1.0.2 | jytek.com | 36...
Page 37 It will change to low when the signal goes below the low threshold as shown in Figure 16. "Hysteresis with Falling Slope Trigger”: The Hysteresis comparator will output high when the signal must first be above the high threshold, then go below the low JY-5320 Series V1.0.2 | jytek.com | 37...
Page 38 "Entering Window Trigger”: The window comparator will output high when the signal enters the window defined by the Low Threshold and High Threshold. And it will output low when the signal leaves the window as shown in Figure 18. JY-5320 Series V1.0.2 | jytek.com | 38...
Page 39 AI Ch0 negative (AI0-,Pin#11). ◼ Set the sinewave signal(f=50 Hz,Vpp=5 V). ◼ Click Strat to run the task. ◼ Open Analog Input-->Winform AI Continuous Analog Trigger, set the following numbers as shown. JY-5320 Series V1.0.2 | jytek.com | 39...
Page 40 3.0 V, which is set by Threshold above. ◼ Click Start, a message will appear in the lower left corner: Figure 21 Waiting For Trigger ◼ The result is shown below: JY-5320 Series V1.0.2 | jytek.com | 40...
Page 41: External Digital Trigger
Learn by Example 8.4.4 ◼ Connect the signal source two positive terminals to JY-5323 AI Ch1, (AI1+, Pin #47) and digital trigger source (PFI 0, Pin#1), two negative terminals to the ground of JY-5320 Series V1.0.2 | jytek.com | 41...
Page 42: Trigger Mode
➢ Since the squarewave is used for the digital trigger source, when a rising edge of the squarewave occurs, the digital trigger will be activated, and the data acquisition will start. 8.5 Trigger Mode JY-5321/5322/5323/5324 supports several trigger modes: Start Trigger, Reference Trigger, ReTrigger and Sample Clock. JY-5320 Series V1.0.2 | jytek.com | 42...
Page 43: Start Trigger
⚫ It returns total 1000 samples, 10 samples to be acquired before trigger, 990 samples after trigger. The acquisition timing is shown in Figure 26. Please see the provided software examples for more information. JY-5320 Series V1.0.2 | jytek.com | 43...
Page 44: Retrigger
Connect the signal source’s positive terminal to JY-5323 AI Ch0 (AI0+, Pin#45), the negative terminal to the ground (AI0-, Pin#11) consists of an RSE input. ◼ Set a sinewave signal (f=50Hz, Vpp=5V). ◼ Open Analog Input-->Winform AI Finite Analog Trigger, set the following JY-5320 Series V1.0.2 | jytek.com | 44...
Page 45 Mode. For ReTrigger can be used by changing the numbers in Retrigger Count. ➢ PretriggerSamples is set by Pretrigger Samples. ◼ Now the trigger is a Start Trigger. Click Start to begin the data acquisition, the result is shown below: JY-5320 Series V1.0.2 | jytek.com | 45...
Page 46 Now change the mode of trigger to Retrigger through giving Retrigger Count a number other than 0 and click Start. A message will appear in the lower left corner: ��ℎ “Complete the �� “trigger”. JY-5320 Series V1.0.2 | jytek.com | 46...
Page 47: Sample Clock
But cannot be less than the actual sampling rate, otherwise it will cause DDR write exception. The default value of this property is -1, which means that the driver will be set with the safest value. ⚫ Implicit JY-5320 Series V1.0.2 | jytek.com | 47...
Page 48: Digital I/O Operations
Open the first program Digital Output-->Winform DO SinglePoint. ◼ Select port 1 for Digital Output, Set Line 0 in High-Level positions, make sure all other lines are in Low-Level positions. Click Start to generate the High-Levels as shown. JY-5320 Series V1.0.2 | jytek.com | 48...
Page 49: Counter Measurement Operations
Open the second program Digital Input-->Winform DI SinglePoint. Figure 33 Single Digital Intput 8.7 Counter Measurement Operations The JY-5321/5322/5323/5324 has two or one identical 32-bit channels of timer/counter as shown in Figure 34. JY-5320 Series V1.0.2 | jytek.com | 49...
Page 50: Edge Counting
Counter Source terminal. Set JY5320CITask.Type to CIType.EdgeCounting to use this function. Timing 1) Single Mode The counting value is written to the register on each rising edge or falling edge of the JY-5320 Series V1.0.2 | jytek.com | 50...
Page 51 In implicit mode, the signal active edge as the implicit sample clock edge. The counting value is stored into the buffer on each rising edge of the measured signal as shown in Figure 37. JY-5320 Series V1.0.2 | jytek.com | 51...
Page 52 ⚫ JY5320CITask.EdgeCounting.Pause.ActivePolarity – To set active level (high or low) to pause counting. Count Direction User can control the counting direction through software configuration or by an external input signal. Default, the external control direction signal must be connected JY-5320 Series V1.0.2 | jytek.com | 52...
Page 53 ⚫ JY5320CITask.EdgeCounting.OutEvent.Terminal – Count event output terminal. Learn by Examples8.7.1 Connect the signal source’s positive terminal of a signal source to PCIe-5323 counter0’s edge counting source (CTR0_Source/A, Pin#1), negative terminal to the ground (DGND, JY-5320 Series V1.0.2 | jytek.com | 53...
Page 54 100 every second for a 100Hz sinewave. Finite/Continuous Mode ◼ Open Counter Input-->Winform CI Finite/Continuous EdgeCounting, set the following numbers as shown: ◼ Click Start to start counting by rising edge. The result is shown below JY-5320 Series V1.0.2 | jytek.com | 54...
Page 55: Pulse Measurement
1) Single Mode The counting value of the duration of the high-level or low-level is written to the register on each rising or falling edge of the pulse to measure, as shown in Figure 42. JY-5320 Series V1.0.2 | jytek.com | 55...
Page 56 3) Finite/Continuous Mode with Implicit Sample Clock In implicit mode, the signal active edge as the implicit sample clock edge. The counting value of the duration of the high-level or low-level is stored into the buffer on each JY-5320 Series V1.0.2 | jytek.com | 56...
Page 57 To change the terminal of signals instead of using its default value shown in chapter 2.6, use following properties: ⚫ JY5320CITask.PulseMeas.InputTerminal – Signal-to-measure input terminal. ⚫ JY5320CITask.PulseMeas.Timebase.External.Terminal – External timebase input terminal. Learn by Examples 8.7.2 ◼ Connect the signal source’s positive terminal to PCIe-5323 counter0’s pulse JY-5320 Series V1.0.2 | jytek.com | 57...
Page 58 Click Start to begin the finite/continuous pulse measurement. The result is shown below: ➢ The numbers show the duration of High/Low Pulse in one signal period and match the duty cycle set before. JY-5320 Series V1.0.2 | jytek.com | 58...
Page 59: Frequency Measurement
) according to the fomular and return the signal frequency to the �� user. �� = �� × �� + �� ℎ �� To configure the counter to work in this mode, set JY5320CITask.Mode to CIMode.Single. JY-5320 Series V1.0.2 | jytek.com | 59...
Page 60 ) according to the HighTick (�� ) and LowTick (�� ) values according to the fomular �� ℎ �� and return the result to the user. �� + �� ℎ �� JY-5320 Series V1.0.2 | jytek.com | 60...
Page 61 ➢ Internal and Implicit Sample Clocks are set by Clock Source as before. (Please refer to Finite/Continuous Mode for more information.) ◼ Click Start and it will show the frequency 50 as set in the signal resource. JY-5320 Series V1.0.2 | jytek.com | 61...
Page 62: Period Measurement
◼ Set a squarewave signal (f=50Hz, Duty Cycle=50%, Vpp=5V). Single Mode ◼ Open Counter Input-->Winform CI Single Period Measure and click Start. The result is shown below by Period Measure(S): JY-5320 Series V1.0.2 | jytek.com | 62...
Page 63 ➢ The result of Period Measure(S) shows the correspond to the frequency set before. Finite/Continuous Mode ◼ Open Counter Input-->Winform CI Finite/Continuous Period Measure and click Start. The result is shown below by PeriodMeasure (S). Figure 50 Period Measure For Continuous Mode JY-5320 Series V1.0.2 | jytek.com | 63...
Page 64: Two-Edge Separation
2) Finite/Continuous Mode with Explicit Sample Clock: The counting values of rising edges of timebase between first signal and second signal are stored into buffer on each rising edge of the sample clock, as shown in Figure 52. JY-5320 Series V1.0.2 | jytek.com | 64...
Page 65 Figure 53. Start First Signal （Gate） Second Signal （Aux） Timebase Register Buffer JY-5320 Series V1.0.2 | jytek.com | 65...
Page 66 Open Counter Input-->Winform CI Single TwoEdgeSeparation Measure and click Start. The result is shown below by First to Second(S) and Second to First(S), which represent the time difference between the rising edges of the two signals: JY-5320 Series V1.0.2 | jytek.com | 66...
Page 67 Open Counter Input-->Winform CI Finite/Continuous TwoEdge Separation Measure and click Start. The result is shown below by First to Second(S) and Second to First(S), which represent the time difference between the rising edges of the two signals: JY-5320 Series V1.0.2 | jytek.com | 67...
Page 68: Quadrature Encoder
When A signal leads B signal, the counter increases the count on the rising edge and the falling edge of A signal; when B signal leads A signal, the counter decreases the count value the rising edge and falling edge of A signal as shown in Figure 57. JY-5320 Series V1.0.2 | jytek.com | 68...
Page 69 To configure the counter to work in this mode, set JY5320CITask.Mode to CIMode.Single. 2) Finite/Continuous Mode with Explicit Sample Clock The count value is stored into the buffer on each rising edge of the sample clock, as shown in Figure 59. JY-5320 Series V1.0.2 | jytek.com | 69...
Page 70 Figure 60. Start Register Buffer Figure 60 Quadrature Encoder x4 with Implicit Sample Clock To configure the counter to work in this mode, set JY5320CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5320CITask.SampleClock.Source to CISampleClockSource.Implicit. JY-5320 Series V1.0.2 | jytek.com | 70...
Page 71 Open Counter Input--> Winform CI Single QuadEncoder and click Start. The result is shown： Figure 61 QuadEncoder For Single Mode ➢ The table in the sample program is a connection diagram for your convenience. ➢ Encoding Type is set by Encode Type (x1, x2, x4). JY-5320 Series V1.0.2 | jytek.com | 71...
Page 72: Two-Pulse Encoder
B signal. Default, the A signal must be connected to Counter A terminal, the B signal mest be connected to Counter B terminal. Set JY5320CITask.Type to CIType.TwoPulseEncoder to use this function Timing 1) Single Mode JY-5320 Series V1.0.2 | jytek.com | 72...
Page 73 Figure 64 Two-Pulse Encoder with Explicit Sample Clock To configure the counter to work in this mode, set JY5320CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5320CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External. 3) Finite/Continuous Mode with Implicit Sample Clock JY-5320 Series V1.0.2 | jytek.com | 73...
Page 74 Pin#6) . (CTR0_Gate/Z, DGND) consists of a pulse measure counter input and they share the same ground. ◼ Set a sqaurewave signal (f=40Hz) and a squarewave signal (f=40Hz). Single Mode ◼ Open Counter Input-->Winform CI Single Two PulseEncoder and set the numbers as shown. JY-5320 Series V1.0.2 | jytek.com | 74...
Page 75 Click Start to start counting. You can see a continuously rising of the Counter Value, which follows the counting rules explained in this chapter. Finite Mode ◼ Open Counter Input-->Winform CI Finite Two PulseEncoder and set the numbers as shown. JY-5320 Series V1.0.2 | jytek.com | 75...
Page 76: Counter Generation Operations
8.8 Counter Generation Operations The JY-5321/5322/5323/5324 can generate multiple forms of output signals according to different timing modes, including: ⚫ Pulse generation with dynamic update ⚫ Buffered pulse sequence generation JY-5320 Series V1.0.2 | jytek.com | 76...
Page 77 To see the signal that JY-5323 Counter Output generates, it is recommended to connect JY-5323 Counter Output (CTR0_OUT, Pin#3) to JY5510 AI Ch0 input (AI0+, Pin#21). JY-5323 Counter GND (GND, Pin#7) to JY5510 AI Ch0 GND (Pin#55). JY-5320 Series V1.0.2 | jytek.com | 77...
Page 78 Click Start to generate a single pulse as shown. Figure 72 AI Acquisition Single Pulse 2) Finite/Continuous Mode This mode allows the user to write all configurations of pulses to be output to the JY-5320 Series V1.0.2 | jytek.com | 78...
Page 79 ⚫ External - Use a signal on a terminal as the timebase By default, the counter uses the onboard 200MHz timebase to generate pulses. Use the property JY5320COTask.Timebase to configure the timebase. Terminals JY-5320 Series V1.0.2 | jytek.com | 79...
Page 80 ➢ The frequency and duty cycle of the pulse are set by Frequency and Duty Cycle. ◼ Please refer Learn by Example 8.2 to configure an analog input to receive the signal from Counter Output. ◼ Click Start to generate a single pulse as shown. JY-5320 Series V1.0.2 | jytek.com | 80...
Page 81 Figure 76 Continuous Pulse Generation ➢ The table in the sample program is a connection diagram for your convenience. ➢ The frequency and duty cycle of the pulse are set by Frequency and Duty Cycle. JY-5320 Series V1.0.2 | jytek.com | 81...
Page 82: Multi-Devices Synchronization
PCIe modules. One PCIe module is designated as the master module and the other PCIe modules are designated as the slave modules. JY-5320 Series V1.0.2 | jytek.com | 82...
Page 83: Dip Switch In Pcie-5320
For example, if you want to set the card number to 3, you could turn the position 2 and 1 of the DIP switch to the ON position and the orthers to OFF. See below for details. Figure 79 DIP Switch in PCIe-5310 JY-5320 Series V1.0.2 | jytek.com | 83...
Page 84: Calibration
Table 21 Relationship between switch position and slot number 9 Calibration JYTEK 5320 boards are precalibrated before the shipment. We recommend you recalibrate JY-5321/5322/5323/5324 boards periodically to ensure the measurement accuracy. A commonly accepted practice is one year. If you need to recalibrate your board, please contact JYTEK.
Page 85: System Noise
11 About JYTEK 11.1 JYTEK China Founded in June, 2016, JYTEK China is a leading Chinese test & measurement company, providing complete software and hardware products for the test and measurement JY-5320 Series V1.0.2 | jytek.com...
Page 86 11.3 JYTEK Warranty and Support Services With our complete software and hardware products, JYTEK is able to provide technical and sales services to wide range of applications and customers. In most cases, our products are backed by a 1-year warranty. For technical consultation, pre-sale and after-sales support, please contact JYTEK of your country.
Page 87 12 Statement The hardware and software products described in this manual are provided by JYTEK China, or JYTEK in short. This manual provides the product review, quick start, some driver interface explanation for JY-5320 family of temperature sensor data acquisition cards. The manual is copyrighted by JYTEK.

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