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Atmel CPLD User Manual
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Atmel CPLD User Manual

Atmel CPLD User Manual

Development/programmer kit
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CPLD Development/Programmer Kit
..............................................................................................
User Guide
BDTIC
www.bdtic.com/Semiconductor

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Summary of Contents for Atmel CPLD

  • Page 1 CPLD Development/Programmer Kit ....................User Guide BDTIC www.bdtic.com/Semiconductor...
  • Page 2 CPLD Development/Programmer Kit User Guide xxxxA–XXXXX–xx/xx...

  • Page 3: Table Of Contents

    Power Connectors ................2-8 2.2.1 Expansion Terminal Holes..............2-9 Atmel CPLD ISP Cable ................2-9 Section 3 CPLD Design Flow Tutorial ..............3-1 Overview ....................3-1 Create a Project Using the “New Project Wizard” ........3-1 Add a Design File..................3-6 Section 4 Schematic Diagrams................4-1 CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 4 Table of Contents CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...

  • Page 5: Introduction

    ATF15xx CPLD. With the availability of the different Socket Adapter Boards to support all the package types offered in the ATF15xx family of ISP CPLDs, this CPLD Develop-...

  • Page 6: Kit Contents

    2 MHz Crystal Oscillator Eight 8-segment LED Displays Global Clear and Output Enable Push Button Switches 1.3.2 Logic Doubling ATF1508AS-15JC84, 5V 128-Macrocell ISP CPLD with Logic Doubling Architecture CPLDs ATF1508ASVL-20JC84, 3.3V Low-power 128-Macrocell ISP CPLD with Logic Doubling Architecture 1.3.3 CPLD ISP Download 5V/3.3V ISP Download Cable for PC Parallel Printer (LPT) Port...

  • Page 7: Atmel Cd-Rom Data Books

    ATF1504ASV/ASVL ATF1516AE/AEL (Future) ATF1504SE/SEL ATF1532AE/AEL (Future) ATF1504AE/AEL System The minimum hardware and software requirements to program an ATF15xx ISP CPLD on the CPLD Development/Programmer Board through the Atmel CPLD ISP Software Requirements (ATMISP) V4.0 or later are: ® Pentium or Pentium-compatible microprocessor based computer ®...

  • Page 8: Technical Support

    169-lead BGA Socket Adapter Board ATF15xx-SAQ208 208-lead PQFP Socket Adapter Board ATF15xx-SACT256 256-lead BGA Socket Adapter Board Technical For technical support on any Atmel PLD related issues, please contact the Atmel PLD Support Applications Group at: Hotline: 1-408-436-4333 Email: pld@atmel.com URL: www.atmel.com/atmel...

  • Page 9: Prochip Designer

    Introduction References To help PLD designers use the different Atmel PLD software, documentation such as Help Files, Tutorials, Application Notes/Briefs, and User Guides are available. 1.8.1 ProChip Designer ProChip Designer From the ProChip Designer main window, click on HELP and then Help Files select PROCHIP DESIGNER HELP.
  • Page 10 Introduction CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...

  • Page 11: Hardware Description

    The Atmel CPLD Development/Programmer Board, along with the Socket Adapter Board as shown in Figure 2-1, contains many features that designers will find very use- Development/ ful when developing, prototyping, or evaluating their ATF15xx CPLD design. Features Programmer such as push-button switches, 8-segment display LEDs, 2 MHz crystal oscillator, Board 5V/3.3V V...

  • Page 12: 8-Segment Display Leds

    V and the individual cathode lines connected to the I/O pins of the ATF15xx CPLD on the CPLD Development/Programmer Board. To turn on a particular segment of an LED, the corresponding ATF15xx I/O pin connected to this LED segment must be in a logical-0 state.
  • Page 13 8/DOT Table 2-3. Connections of LEDs to ATF15xx 68-lead PLCC DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # 1/DOT 3/DOT 5/DOT 7/DOT 2/DOT 4/DOT 6/DOT 8/DOT CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 14 8/DOT Table 2-5. Connections of LEDs to ATF15xx 100-lead TQFP DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # 1/DOT 3/DOT 5/DOT 7/DOT 2/DOT 4/DOT 6/DOT 8/DOT CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 15 8/DOT Table 2-7. Connections of LEDs to ATF15xx 144-lead TQFP DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # DSP/Sgt PLD Pin # 1/DOT 3/DOT 5/DOT 7/DOT 2/DOT 4/DOT 6/DOT 8/DOT CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...

  • Page 16: Push-Button Switches

    GCLR and OE1 input pins of the ATF15xx. 2.1.3 Clock Select Jumper The Clock Select Jumper, labeled JPCLK, on the CPLD Development/Programmer Board is a two-position jumper that allows the user to select which GCLK dedicated input pin (either GCLK1 or GCLK2) of the ATF15xx should be connected to the output of the 2 MHz crystal oscillator.

  • Page 17: Vcc Select Jumper

    JTAG signals are generated by the LPT port and they are buffered by the ISP download cable before going into the ATF15xx on the CPLD Development/Programmer Board. The pinout for the 10-pin JTAG Port Header on the CPLD Development/Pro- grammer Board is shown in Figure 2-3 and the dimensions of this 10-pin male JTAG header are shown in Figure 2-4.

  • Page 18: Power Connectors

    The second power connector, labeled JP Power, is a 4-pin male 0.1" header with 0.025" square posts. The availability of these two types of power connec- tors allows the users to choose the type of power supply equipment to use for the CPLD Development/Programmer Board.

  • Page 19: Socket Adapter

    If the user is attempting to program low voltage (3.3V) devices, the user needs to use Rev. 4 or later of the Atmel CPLD ISP Cable. This and later revisions will support both the 3.3V and 5V ATF15xx ISP CPLDs. Earlier revisions of the cable only supported 5V devices.
  • Page 20 10-pin male header on the PC board (if used for ISP) must match this pinout. Figure 2-6. Atmel ISP Download Cable 10-pin Female Header Pinout Note: The user’s circuit board must supply VCC and GND to the Atmel CPLD ISP Cable through the 10-pin male header (See Figure 2-3). 2-10 CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...

  • Page 21: Cpld Design Flow Tutorial

    This tutorial will guide the user through a complete design cycle for the Atmel ATF15xx CPLD with Logic Doubling architecture. It will go through each phase of the design cycle step-by-step from design entry, logic synthesis, device fitting, in-system programming, and finally verifying the design on the Atmel CPLD Development/Programming Board.
  • Page 22 Note: The name and directory of the design project is specified in this window. All design, simulation and other project files must be placed in this project direc- tory. (4) Click on Browse (5) Select the Project Directory (6) Enter the Project Filename CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 23 VHDL – Exemplar VHDL design entry through Exemplar Leonardo Spectrum Schematic – Altium Schematic design entry through Altium Protel 99SE ® Note: 1. Design flow require Mentor Graphics Leonardo Spectrum software with Atmel CPLD support. CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 24 10. Click the FINISH button to finish the New Project Wizard and the project creation process. This closes the New Project Wizard and opens the ProChip Designer window. The Sources in the project are shown in the Left window. (10) Click Finish to End New Project Wizard CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 25 CPLD Design Flow Tutorial 11. Click on the Device Icon [ATF1508AS-10JC84] to view the Design Flow window. Project Sources Window Information Dialog Box Message Window (11) Click on the Device Icon Project File Window Design Flow Window CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...

  • Page 26: Add A Design File

    This "LOGIC_D8.PLD" is a CUPL design that uses the eight 8-segment LED displays and the 2 MHz oscillator on the Atmel CPLD Development/Programmer Board to gener- ate a scrolling message that displays the words "logic doubling" on the LEDs. The GOE push-button switch is used to control the direction that the message scrolls in (left or right).
  • Page 27 CPLD Design Flow Tutorial The next section of this CPLD design as shown below illustrates how to declare and assign pin numbers in the CUPL language to the input and output signals. The input and output pin assignments are assigned according to the connections between the CPLD and the eight 8-segment LED's as shown in the connection tables (Table 2-1 to Table 2- 8) in Section 2.
  • Page 28 LEDs. The GOE push-button switch on the CPLD Development/Programmer Board controls the flow of this state machine. When this switch is in the "up" position, the state machine will go from RESET to State-0 to State-1 to State-2 and so on until it reaches State-14 and then it will go back to State-0.
  • Page 29 The user can click on the Set Defaults button and it will automatically specify the Syn- thesis tool in the Tool Text box. If the user clicks on the CUPL Tab, it shows the various Synthesis options. Please refer to the HELP file for further description. CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 30 CPLD Design Flow Tutorial Fit the In Section 3.4, the Logic Synthesis portion of the CPLD Design Flow was completed. On successful compilation, the CUPL compiler tool produces a PLA output file (with exten- Synthesized sion .pla). A PLA file contains the netlist of the optimized and minimized logic equations.
  • Page 31 ATF15xx Family, refer to Atmel's Logic Doubling White Paper and Reference Designs available on the Atmel website. These examples show how to apply Logic Doubling techniques to new product designs, to obtain the benefits of more features in a smaller and possibly less expensive chip, or spare logic resources for future revisions and reduce the risk of PCB re-spin.
  • Page 32 Program and In this step of the tutorial, the user will program an ATF1508AS 84-pin PLCC device on the Atmel CPLD Development/Programmer Board through ISP and then verify the Verify Design design by observing the text messages displayed on the eight 8-segment LED displays of the CPLD Development/Programmer Board.
  • Page 33 The next few steps require the user to setup the Atmel CPLD Development/Programmer Board to program the ATF1508AS through ISP. 7. Connect the 25-DB side of the Atmel-ISP Cable to the PC's parallel port and the 10-pin header side of the Atmel-ISP Cable to the Atmel CPLD Development Board as shown Figure 2-5.
  • Page 34 After successfully programming the ATF1508AS with the LOGIC_D8.JED file, the eight 8-segment LED's will display the words "Logic Doubling". If these two text messages are correctly displayed on the CPLD Development/Program- mer Board, then the user has successfully completed this tutorial.

  • Page 35: Schematic Diagrams

    Section 4 Schematic Diagrams CPLD Development/Programmer Kit User Guide Rev. 3300A–PLD–08/02...
  • Page 36 Schematic Diagrams Figure 4-1. Schematic Diagram of the Atmel CPLD Development/Programmer Board RDSP11 RDSP11 RDSP12 RDSP12 RDSP13 RDSP13 RDSP14 RDSP14 RDSP15 RDSP15 D 1 E D 1 E RDSP16 RDSP16 RDSP17 RDSP17 DOT1 DOT1 RDSP21 RDSP21 RDSP22 RDSP22 RDSP23 RDSP23...
  • Page 37 JPLEFT GCLR ATMEL PLCC44 HEADER 20X2 JPRIGHT GCLK1 GCLK2 PLCC44 0.1uF 0.1uF 0.1uF 0.1uF HEADER 20X2...
  • Page 38 JPLEFT GCLR ATMEL TQFP44 HEADER 20X2 JPRIGHT GCLK1 GCLK2 TQFP44 0.1uF 0.1uF 0.1uF 0.1uF HEADER 20X2...
  • Page 39 JPLEFT GCLR ATMEL PLCC68 T C K HEADER 20X2 JPRIGHT GCLK1 GCLK2 0.1uF 0.1uF 0.1uF 0.1uF HEADER 20X2...
  • Page 40 PIN17 PIN69 PIN51 PIN50 JR31 JR32 PIN18 PIN68 PIN49 PIN48 JR33 JR34 PIN67 PIN46 PIN20 VCC_IO PIN21 ATMEL PIN65 HEADER 20X2 PIN22 PIN64 PIN63 I/O / TMS PIN24 ATF1508AS-15JC84 JPLEFT I/O / TCK PIN25 PIN61 PIN60 PIN84 GCLR PIN1 VCC_IO...
  • Page 41 DOT6 DOT7 I/On I/On I/On I/On DOT4 DOT8 VCCIO I/On I/On DOT6 I/On I/On HEADER 20X2 JPRIGHT VCCIO GCLK1 GCLK2 ATMEL PQFP100 DOT3 DOT4 VCCIO DOT7 DOT3 I/On I/On I/On I/On DOT2 VCCIO DOT2 I/On I/On DOT8 DOT1 I/On I/On...
  • Page 42 JPLEFT GCLR DOT5 DOT6 DOT4 I/On I/On VCCIO I/On DOT7 I/On DOT6 I/On I/On DOT8 VCCIO ATMEL TQFP100 DOT3 HEADER 20X2 JPRIGHT VCCIO GCLK1 GCLK2 DOT2 I/On DOT7 I/On I/On DOT4 I/On VCCIO TQFP100 DOT3 DOT2 0.1uF 0.1uF 0.1uF 0.1uF...
  • Page 43 P 6 3 P118 P117 P 6 5 P116 I/On VCCIO P 6 7 P114 P 6 8 P113 P 6 9 P112 P 7 0 DOT4 P111 P 7 1 P110 P 7 2 P109 CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 44 P 1 3 5 P 1 3 4 VCCIO P 1 3 2 DOT2 P 1 3 1 P 1 3 0 P 1 2 9 P 1 2 8 P123 P122 VCCIO P121 4-10 CPLD Development/Programmer Kit User Guide 3300A–PLD–08/02...
  • Page 45 Buffer/Line Driver R16 100 1N4148 R17 100 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k R18 100 R19 100 STROBE AUTO R20 100 INIT SEL_IN nACK BUSY 74VHC244 20-SOIC 0.1uF HEADER 5X2 330ohm 10 Pin Header to ISP Board...
  • Page 46 Parallel Port Section Voltage Detection R 2 100 STROBE R 3 100 AUTO 4.7K 1.36V at VCC = 3.3 R 4 100 2.06V at VCC = 5.0 1.5V - 1.6V Vref ERROR 1N4148 INIT SEL_IN 3.3K 1N4148 1N4148 nACK LM393 LM393 BUSY 8-SOP...