Indicator (Diagram 76); Led Driver; Power Indicator 2; Main Interconnect (Dia. 77 - 88) - Tektronix RTD 710A Service Manual

Theory of Operation
When Field 1 is selected, the FLD SEL signal be-
comes high, U510D-12 becomes low, disabling U490A
and U500B. The preset data (DLYDO-DLYD10) cor-
responding to the specified line number is applied
to the 11-bit binary counter and the pulse used to
preset the counter is generated from the field pulse
applied through U500D and U500C. While the preset
pulse is high, U410D-3 is low, cutting off the HCLK
signal from the counter.
When the specified field is reached, the preset pulse
is released, HCLK is applied to the counter through
U410C, U490B, and U500A, and the count begins.
if the preset data is the same as the clock number,
a carry signal (U480-2) is output, causing U400B to
close gate U410C at the end of a half clock delay,
thus stopping clock HCLK. This carry signal cor-
tesponds to the specified field and line, thus it be-
comes the field trigger pulse. This sequence repeats
for each frame.
If fied 2 is selected, the preset pulse is applied to
the counter through U410D, U500B, and U500C, and
HCLK is applied through U410C, U490A, and US00A
to the counter. At this point the operation of the cir-
cuit is similar to that for field 1. When the field has
been exceeded and the line number is specified,
(Le., when the specified line number does not fail in
the specified field, such as in NTSC, when line 520
is specified for field 1), the MPU automatically
switches to the correct field for the specified line
number. This ensures that the trigger is correctly ap-
plied to the specified field and line.
Delay Counter
The delay counter (U460, U470, U480, and U510F)
is controlled by the clock and reset pulses from the
delay counter control circuit, and by delay data from
the MPU. It uses binary incremental configuration to
ensure output of a stable carry output. Delay data
are supplied to the delay counter in two's compie-
ment. The carry output is applied simultaneously to
the delay counter control circuit, and the A22 Trig-
ger board through buifer U510F as the field trigger
1-138
INDICATOR (DIAGRAM 76)
The indicator circuit board (A64) is installed when
the blank front pane! option (Option 19) is installed.
LED driver, option bit, a power indicator, and secon-
dary power switch circuits.
LED driver U100A controls the trigger status indicators
Option bit buffer U100B holds option bit data that
determines whether or not the Panel Controi Board
(A60) or the indicator Board (A64) is installed in the
instrument. When the Indicator Board is installed,
BO1 and BDO are 0 and 1, respectively.
Power Indicator
Power indicator LED DS001 indicates whether or not
the power moduie is applying power to the instru-
ment.
The secondary power switch (S846) on the front
panel is connected to the power module through the
Indicator board and Mother board to control the
or/standby condition of the power module.
MAIN INTERCONNECT
(DIAGRAM 77 - 89)
The Main Interconnect board shown in schematics
77-89 (also referred to as the Mother board) is lo-
cated at the bottorn of the instrument. It is used to
interconnect signals among the instrument boards.
This board contains a number of filter capacitors for
preventing and reducing noise generated by the buses
on this board.
RTD 710A Service Manuai