Omron CJ - REFERENCE MANUAL 10-2009 Reference Manual page 1038

3. Instructions
Note • The logic diagnosis function is executed every cycle as long as the execution condition for FPD(269) is
ON. The operation of the logic diagnosis function is independent of the time monitoring function.
• The input circuit to be logically diagnosed should consist of multiple N.C. or N.O. conditions.
• When two or more input bits are preventing the diagnostic output from being turned ON, the address of
the first input bit in the execution condition (on the highest instruction line and nearest the left bus bar) will
be output to R+2 through R+4.
• Input bits in LD, LD NOT, AND, AND NOT, OR, and OR NOT instructions (including differentiated and
immediate-refreshing variations) will be checked by the logic diagnosis function. Input bits in other
instructions and operands addressed indirectly through Index Registers will not be checked.
• The logic diagnosis block begins with the first LD (not LD TR) or LD NOT instruction after FPD(269) and
ends with the first OUT (not OUT TR) or other right-hand instruction.
• There are two diagnostic output modes, set with the leftmost digit of C.
1. Bit address output mode (Leftmost digit of C = 0)
Bit 15 of R (the Bit Address Found Flag) is turned ON when an input bit address has been found and
bit 14 of R indicates whether the input is normally ON or normally OFF.
The 8-digit hexadecimal PLC memory address of the input bit is output to R+3 and R+2.
2. Bit address and message output mode (Leftmost digit of C = 8)
Bit 15 of R (the Bit Address Found Flag) is turned ON when an input bit address has been found and
bit 14 of R indicates whether the input is normally ON or normally OFF.
The input bit's address is output to R+2 through R+4 as 6 ASCII characters.
Register Word Functions
The register words contain the results of the diagnostic function and can also contain an ASCII error
message which is displayed when an error is generated by the time monitoring function. The function of
the register words depends upon the diagnostic output mode which is set with the leftmost digit of C.
Bit Address Output (C=0@@@)
When the leftmost digit of C is set to 0, the 8-digit hexadecimal PLC memory address of the input bit is
output to R+2 and R+3. R contains two flags which indicate whether an input bit has been found and
whether it is used in a normally open or normally closed input condition.
15 14 13
R
Input type
0: Normally open
1: Normally closed
Bit Address Found Flag
0: Not found yet
1: Bit address found
15
R+1
R+2
1000
0
Not possible to use.
0
Not possible to use.
R+3
CS/CJ/NSJ Series Instructions Reference Manual (W474)