Panasonic CF-62 Service Manual page 78

9. |/O address map
1) System
CF-62 CF-62 |
| Address | Function ICN.
DMA Channel 0 base and current address
DMA Channel 0 base and word count
DMA Channel 1 base and current address
DMA Channel 1 base and word count
DMA Channel 2 base and current address
DMA Channel 2 base and word count
DMA Channel 3 base and current address
DMA Channel 3 base and word count
Command Register, DMA Controller 1
Request Register, DMA Controller 1
Mask Register, DMA Controller 1
Mode Register, DMA Controller 1
Clear byte pointer, DMA Controller 1
Master Clear, DMA Controller 1
Temporary Register, DMA Controller 1
Write all Mask Register Bits, DMA Controller 1
Clear Mask Register, DMA Controller 1
Initialization Control Word |CW1, Interrupt Controller 1
Initialization Control Word ICW2, Interrupt Controller 1
Initialization Control Word ICW3, (Master Device) Interrupt Controller 1
Initialization Control Word ICW3, (Slave Device) Interrupt Controller 1
Initialization Control Word ICW4, Interrupt Controller 1
Operation Control Word OCW41, Interrupt Controller 1
Operation Control Word OCW2, Interrupt Controller 1
Operation Control Word OCW3, Interrupt Controller 1
AT Core Logic Index Register
AT Core Logic Data Register
Timer Counter 1 Channel 0 count
Timer Counter 1 Channel 1 count
Timer Counter 1 Channel 2 count
Timer Counter 1 Command Register
Timer Counter 2 Channel 0 count
Timer Counter 2 Channel 2 count
Timer Counter 2 Command Register
Keyboard Controller data I/O input buffer
Keyboard Controller data I/O output buffer
Port 61
Keyboard Controller Command
Keyboard Controller Status
CMOS RAM Address port and NMI Mask
RTC CMOS RAM data port
Reserved
DMA Memory Address Mapper Page Register Channel 2
DMA Memory Address Mapper Page Register Channel 3
DMA Memory Address Mapper Page Register Channel 1
Reserved
Reserved
Reserved
DMA Memory Address Mapper Page Register Channel 0
Reserved
Continued
DMA Memory Address Mapper Page Register Channel 6
DMA Memory Address Mapper Page Register Channel 7
DMA Memory Address Mapper Page Register Channel 5
Reserved
Reserved
Reserved
DMA Memory Address Mapper Page Register - Refresh
Port 92
Initialization Control Word ICW1, Interrupt Controller 2
Initialization Control Word |CW2, Interrupt Controller 2
Initialization Control Word ICW3, (Master Device) Interrupt Controller 2
Initialization Control Word ICW3, (Slave Device) Interrupt Controller 2
Initialization Control Word ICW4, Interrupt Controller 2
Operation Control Word OCW1, Interrupt Controller 2
Operation Control Word OCW2, Interrupt Controller 2
Operation Control Word OCW3, Interrupt Controller 2
Power Management Register
Power Management Register
DMA Channel 4 base and current address
DMA Channel 4 base and current word count
DMA Channel 5 base and current address
DMA Channel 5 base and current word count
DMA Channel 6 base and current address
DMA Channel 6 base and current word count
DMA Channel 7 base and current address
DMA Channel 7 base and current word count
Command Register, DMA Controller 2
Status Register, DMA Controller 2
Request Register, DMA Controller 2
Mask Register, DMA Controller 2
Mode Register, DMA Controller 2
Clear byte pointer, DMA Controller
Master Clear, DMA Controller 2
Temporary Register, DMA Controller 2
Clear Mask Register, DMA Controller 2
Write all Mask Register Bits, DMA Controller 2
APMC Index Register
APMC Data Register
G/A Index Register
G/A Data Register
220H-22FH or | Sound Chip
230H-—23FH or
240H-24FH or
250H-25FH
278H-27AM
1000H—103FH
(Changeable)
| Address [Function