The Input Data Format; Sel68 - Advantech IDK-2115 Series User Manual

Table 3.1: Pin Description
17 RxIN4-
18 RxIN4+
19 VSS
20

SEL68

Note1: Input signals shall be in low status when VDD is off.
Note2: For 6 bits mode, please keep the Pin 17& Pin 18 NC or make sure that the
voltage of Pin 18 is always higher than the voltage of Pin 17.
3.3

The Input Data Format

3.3.1 SEL68
SEL68 = "Low" or "NC" for 6 bits LVDS Input
RxCLKIN
RxIN1
RxIN2
RxIN3
SEL68 = "High" for 8 bits LVDS Input
RxCLKIN
RxIN1
RxIN2
RxIN3
RxIN4
Note1: Please follow PSWG.
Note2: R/G/B data 7:MSB, R/G/B data 0:LSB
Signal Name
R7
R6
R5
R4
R3
R2
R1
R0
LVDS receiver signal channel 3, NC for 6 bit LVDS Input
LVDS Differential Data Input (R6, R7, G6, G7, B6, B7, RSV)
Ground
6/ 8bits LVDS data input selection [H: 8bits L/NC: 6bit]
G0 R5
B1 B0
DE VS
G0 R5
B1 B0
DE VS
RSV B7
Description Remark
Red Data 7
Red Data 6
Red Data 5
Red Data 4
Red-pixel Data, For 8 bits LVDS input, MSB: R5;
LSB:R0
Red Data 3
Red Data 2
Red Data 1
Red Data 0
11
R4 R3 R2
G5 G4 G3 G2
HS B5 B4
R4 R3 R2
G5 G4 G3 G2
HS B5 B4
B6 G7 G6
IDK-2115 User Manual
R1 R0
G1
B3 B2
R1 R0
G1
B3 B2
R7 R6