Advertisement
Theory of Operation
HP 82713A
2-29.
The Buffer Circuit Consists of the following circuits:
0 Unidirectional buffer
0 Bidirectional buffer
0 EMI circuitry
2-30.
The Unidirectional buffer buffers the clock lines (phi 1, phi 2) and
control lines (LMA, RD, WR) from the HP=-T5 bus before reaching the logic
board. This insures that the load of the PMS is isolated from the HP=T75 so
that the 75 is not adversely affected in normal operation. The buffer used
is an inverting type constructed in high speed CMOS. Typical time delay
through the buffer is 10nsec.
oO
3
12
01
Figure 2-11.
Unidirectional Buffer
2-31.
The Bidirectional buffer allows data to be read and written to the
PMS from the HP-75. U1 on the buffer board contains the neccesary circuitry
to accomplish this (see figure 2-12). The direction of data flow is
controlled by the SEND signal from the logic board. When the SEND signal is
asserted, the buffer is enabled to allow data flow from the PMS to the
HP-75. When SEND is not asserted, the buffer allows data to be sent from the
HP-75 to the PMS.
2-32.
The SEND signal is inverted on the buffer board and pulled to ground
through a
1 Mohm resistor.
This is done to insure that data may still flow
to the PMS even when the SEND line is disconnected on the logic board. This
allows the HP-75 to talk to the PMS for troubleshooting purposes.
Advertisement
