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HP 82713A
Theory of Operation
2-14.
The Control Logic demultiplexes and increments the 16 bit address
from the HP-75 bus. When the HP-75 sends out an address, it is sent out
in 2 seperate bytes. The first byte (least significant byte) is latched
into a buffer (U4) when the LMA line from the 75 is pulsed. When the LMA
line is pulsed a second time, the first byte in U4 and the second byte
now on the HP-75 bus, are loaded into the counters (US5-U8).
2-15.
The Control Logic circuit also increments US5-U8. This occurs when a
read or write occurs on the HP-75 bus in the absence of an LMA pulse.
LOAD
02
3
Cnmme—
u3 DLL R7TW
D2 FF
o1
*-
1
.
¢
4
CLK 1
Figure 2-4.
Control Logic circuit.
2-5
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