Supermicro SUPER PIIISCA User Manual page 97

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Check
Point
Description
4C
The memory below 1 MB has been cleared via a soft
reset. Clearing the memory above 1 MB next.
4D
The memory above 1 MB has been cleared via a soft
reset.
52h next.
4E
The memory test started, but not as the result of a soft
reset. Displaying the first 64 KB memory size next.
4F
The memory size display has started.
updated during the memory test.
sequential and random memory test next.
50
The
initialized.
relocation and shadowing next.
51
The memory size display was adjusted for relocation
and shadowing. Testing the memory above 1 MB next.
52
The
initialized. Saving the memory size information next.
53
The memory size information and the CPU registers are
saved. Entering real mode next.
54
Shutdown was successful. The CPU is in real mode.
Disabling the Gate A20 line, parity, and the NMI next.
57
The
disabled.
relocation and shadowing next.
58
The memory size was adjusted for relocation and
shadowing. Clearing the Hit <DEL> message next.
59
The Hit <DEL> message is cleared. The <WAIT>
message is displayed.
controller test next.
Appendix B: AMIBIOS POST Diagnostic Error Messages
Saving the memory size next.
memory
below
Adjusting the displayed memory size for
memory
above
A20
address
line,
Adjusting the memory size depending on
B-5
Going to checkpoint
Performing the
1
MB
has
been
1
MB
has
been
parity,
and
Starting the DMA and interrupt
The display is
tested
and
tested
and
the
NMI
are

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