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S
UPER PIIISCA/PIIISCD/PIIISCE/370SC3/370SCI/370SCD User's Manual
Check
Point
Description
10
The keyboard controller command byte is written.
Next, issuing the pin 23 and 24 blocking and unblocking
commands.
11
Next, checking if the <End or <Ins> keys were pressed
during
Initialize CMOS RAM in every boot AMIBIOS POST
option was set in AMIBCP or the <End> key was
pressed.
12
Next, disabling DMA controllers 1 and 2 and interrupt
controllers 1 and 2.
13
The video display has been disabled.
initialized. Next, initializing the chipset.
14
The 8254 timer test will begin next.
19
The 8254 timer test is over.
test next.
1A
The memory refresh test line is toggling.
15 second on/off time next.
23
Reading
MEGAKEY
BIOS
necessary configuration before initializing the interrupt
vectors.
24
The
initialization has completed.
is done.
switch is on.
25
Interrupt vector initialization is done.
password if the POST DIAG Switch is on.
27
Any initialization before setting video mode will be
done next.
power
on.
Initializing
the
8042
input
Green
PC
code
segment
configuration
required
Clearing the password if the POST DIAG
B-2
CMOS
Port B has been
Starting the memory refresh
port
and
feature
next.
writable
and
performing
before
interrupt
Interrupt vector initialization
RAM
if
the
Checking the
disabling
the
Making
the
any
vector
Clearing the
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