Espressif ESP32-S2 Programming Manual page 1488

Chapter 4. API Guides
use case, assembler will convert the address of label loop from bytes to words, when generating MOVE instruction, so
the code generated code will be equivalent to:
0000 NOP
0004 NOP
0008 NOP
000c NOP
0010 MOVE R1, 4
0014 JUMP R1
The other case is when the argument of MOVE instruction is not a label but a constant. In this case assembler will use
the value as is, without any conversion:
.set val, 0x10
MOVE R1, val
In this case, value loaded into R1 will be 0x10.
Similar considerations apply to LD and ST instructions. Consider the following code:
.global array
array: .long 0
.long 0
.long 0
.long 0
MOVE R1, array
MOVE R2, 0x1234
ST R2, R1, 0
ST R2, R1, 4
ADD R1, R1,
ST R2, R1, 0
Note about instruction execution time
ULP coprocessor is clocked from RTC_FAST_CLK, which is normally derived from the internal 8MHz oscillator.
Applications which need to know exact ULP clock frequency can calibrate it against the main XTAL clock:
#include "soc/rtc.h"
// calibrate 8M/256
uint32_t rtc_8md256_period
uint32_t rtc_fast_freq_hz
8md256_period;
→
ULP coprocessor needs certain number of clock cycles to fetch each instruction, plus certain number of cycles to
execute it, depending on the instruction. See description of each instruction below for details on the execution time.
Instruction fetch time is:
• 2 clock cycles —for instructions following ALU and branch instructions.
• 4 clock cycles —in other cases.
Note that when accessing RTC memories and RTC registers, ULP coprocessor has lower priority than the main
CPUs. This means that ULP coprocessor execution may be suspended while the main CPUs access same memory
region as the ULP.
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// write value of R2 into the first array element,
// i.e. array[0]
// write value of R2 into the second array element
// (4 byte offset),
2 // this increments address by
// write value of R2 into the third array element,
// i.e. array[2]
clock against XTAL, get
= rtc_clk_cal(RTC_CAL_8MD256, 100);
= 1000000ULL *
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i.e. array[1]
2 words
8M/256 clock period
(1 << RTC_CLK_CAL_FRACT)
1477
(8 bytes)
* 256 / rtc_
Release v4.4