Espressif ESP32-S2 Programming Manual page 1496

Chapter 4. API Guides
Rdst[15:0] = Mem[Rsrc
The LD command do the same as LDL, and included for compatibility with previous versions of ULP core.
Examples:
1: LDL R1, R2,
2: .data
Addr1: .word
.set
.text
MOVE
MOVE
converted into words)
→
LDL
LDH –Load data from high part of the 32-bits memory
Syntax LDH Rdst, Rsrc, offset
Operands Rdst –Register R[0..3], destination
Rsrc –Register R[0..3], holds address of destination, in 32-bit words
Offset –13-bit signed value, offset in bytes
Cycles 4 cycles to execute, 4 cycles to fetch next instruction
Description The instruction loads higher 16-bit half-word from memory with address Rsrc+offset into the destina-
tion register Rdst:
Rdst[15:0] = Mem[Rsrc
The LD command do the same as LDL, and included for compatibility with previous versions of ULP core.
Examples:
1: LDH R1, R2,
2: .data
Addr1: .word
.set
.text
MOVE
MOVE
converted into words)
→
LDH
JUMP –Jump to an absolute address
Syntax JUMP Rdst
JUMP ImmAddr
JUMP Rdst, Condition
JUMP ImmAddr, Condition
Operands
• Rdst –Register R[0..3] containing address to jump to (expressed in 32-bit words)
• ImmAddr –13 bits address (expressed in bytes), aligned to 4 bytes
• Condition:
– EQ –jump if last ALU operation result was zero
– OV –jump if last ALU has set overflow flag
Cycles 2 cycles to execute, 2 cycles to fetch next instruction
Espressif Systems
+ offset / 4][15:0]
0x12 //R1
//Data section definition
123 //
offs, 0x00 //
//Text section definition
R1, 1 //
R2, Addr1 //
R1, R2, offs //
//
+ offset / 4][15:0]
0x12 //R1
//Data section definition
0x12345678
offs, 0x00 //
//Text section definition
R1, 1 //
R2, Addr1 //
R1, R2, offs //
//
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= MEM[R2+0x12]
Define label Addr1
Define constant offs
R1 = 1
R2 = Addr1 / 4 (address of label
R1 = MEM[R2 + 0]
R1 will be 123
= MEM[R2+0x12]
// Define label Addr1
Define constant offs
R1 = 1
R2 = Addr1 / 4 (address of label
R1 = MEM[R2 + 0]
R1 will be 0x1234
1485
16 bit
is␣
16 bit
is␣
Release v4.4