Plug-In Details - Analog Devices EVAL-ADMV8505 User Manual

User Guide
EVALUATION BOARD SOFTWARE

PLUG-IN DETAILS

The full screen ADMV8505 chip plug-in with labels is shown in
Figure 7. The labels correspond to items listed in
Table 1. ADMV8505 Chip Plug-In Label Functions (See
Label Function
A Use the CONFIGURATION section to initialize the ADMV8505-EVALZ.
Load Settings from CSV: click the ... button to select which .csv file to load into the CONFIGURATION section.
Check to Load Settings: once a file is selected, select this check box to load the .csv file contents into the CONFIGURATION section. Note that a check mark
does not appear when the check box is selected.
Filter Configuration: select the configuration settings for enabling or disabling the interpolation function.
WR Grouping: select the write (WR) grouping settings for SPI write mode.
SFL Settings: select the SPI fast latch (SFL) settings that are used when the chip is placed into the SPI fast latch mode.
Lookup Table 0 to 15: define the configuration for lookup table (LUT)0 to LUT15.
Lookup Table 16 to 31: define the configuration for LUT16 to LUT31.
Coefficients: define the interpolation coefficients.
Summary: click this button to review the settings for the initial setup.
Apply: click this button to apply the settings to the chip. Note that clicking Apply Changes (J1) does not update the changes in this section. In addition, at
startup, the main diagram user controls cannot be updated until the Apply button is clicked at least once.
Restore Software Defaults: click this button to zero out the CONFIGURATION section before loading a different .csv file.
B Use the SFL Settings section to configure the SPI fast latch settings on the chip when in the SFL mode. Refer to the ADMV8505 data sheet for more
information regarding the internal state machine and SFL mode functionality. This section includes the following:
FAST_LATCH_STATE: this value is the next state of the internal state machine pointer (read only).
FAST_LATCH_START: this value determines the start location within the internal state machine.
FAST_LATCH_STOP: this value determines the stop location within the internal state machine.
FAST_LATCH_DIRECTION: this bit determines the direction that the internal state machine advances for each rising edge of the CS pin when in SFL mode.
C
The Status section includes the following:
Mode: when the SFL pin is low, the mode is SPI Write. When the SFL pin is high, the mode is SPI Fast Latch, and the chip uses the LUT.
CSB_AUX Count: when in SFL mode, this field displays the number of times the
Message: upon entering SFL mode, the Message field displays Waiting for CSB. Once the CSB_AUX pin is toggled, the Message field displays the current
LUT number followed by the next LUT number.
analog.com
describes the functionality of each section. For additional detailed
programming, refer to the ADMV8505 data sheet.
Table 1, which
Figure 7. ADMV8505 Chip Plug-In with Labels
Figure 7)
EVAL-ADMV8505
SDP-S logic pin, CSB_AUX, was toggled.
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