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8XLite OSM-Size SE LGA Module Hardware User Guide iW-RainboW-G46M i.MX 8XLite Dual/Solo OSM-Size SE LGA Module Hardware User Guide DRAFT VERSION SUBJECT TO CHANGE REL0.1 iWave Systems Technologies Pvt. Ltd. Page 1 of 52...
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If you are not the intended recipient (or authorized to receive for the recipient), you are hereby notified that any disclosure, copying distribution or use of any of the information contained within this document is STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.” REL0.1 iWave Systems Technologies Pvt.
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No warranty of accuracy is given concerning the contents of the information contained in this publication. To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document.
This document is the Hardware User Guide for the NXP’s i.MX 8XLite (Dual/Solo) Application processor based OSM v1.0 specification compatible LGA module. This board is fully supported by iWave Systems Technologies Pvt. Ltd. This Guide provides detailed information on the overall design and usage of the i.MX 8XLite OSM Module from a Hardware Systems perspective.
Universal Asynchronous Receiver/Transmitter Universal Serial Bus Video Processing Unit Terminology Description In this document, wherever Signal Type is mentioned, below terminology is used. Table 2: Terminology Terminology Description Input Signal REL0.1 iWave Systems Technologies Pvt. Ltd. Page 8 of 52...
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes the pull-ups or pull-downs implemented On-OSM. References • IMX8DXLA1AEC_Revx.pdf • iMX8DXL_RM_Rev_x.pdf • OSM Specification V1.0 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 9 of 52...
In this signal, BCONFIG_0 is the GPIO functionality and GPIO1_05 is the GPIO number. Note: The above naming is not applicable for other signals which are not connected to SoC. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 10 of 52...
2. ARCHITECTURE AND DESIGN This section provides detailed information about i.MX 8XLite OSM LGA Module SOM and Hardware architecture with high level block diagram. i.MX 8XLite OSM LGA Module Block Diagram iW-RainboW-G46M- i.MX 8XLite based OSM Block Diagram On-Board Power to i.MX 8XLite...
: 5V, 2.5A • Form Factor : 30mm X 30mm (OSM V1.0 Specification) Memory Size will differ based on iWave’s SOM Product Part Number. By default, only 1 Data UART port is supported. 2 UART is muxed with CAN. REL0.1 iWave Systems Technologies Pvt.
8XLite OSM-Size SE LGA Module Hardware User Guide i.MX 8XLite SoC iW-RainboW-G46M OSM LGA Module can support i.MX 8XLite SoCs from NXP. The i.MX 8XLite Family consists of two processors: i.MX 8XLite Dual & i.MX 8XLite Solo. The Major Difference between i.MX 8XLite SoCs are: •...
I2C after start up offering flexibility for different system states. The PF7100 PMIC comes in 48pin 7x7 QFN Package and is placed on the Top side of the Module. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 14 of 52...
The eMMC flash memory (U3) is physically located on Top side of the Module. The memory size of the eMMC Flash can be customised based on the requirement by contacting iWave Support Team. REL0.1 iWave Systems Technologies Pvt. Ltd.
OSM LGA has standard pinout as per OSM Specification V1.0 The interfaces which are available at 332 contacts are explained in the following sections. Figure 3: OSM LGA Number of contacts - : 332 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 16 of 52...
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8XLite OSM-Size SE LGA Module Hardware User Guide OSM Pins Signal VCC_IN_5V VCC_IN_5V VCC_IN_5V GPIO2_IO05(SNVS_TAMPER_OUT1) GPIO2_IO10(SNVS_TAMPER_IN1) SNVS_TAMPER_IN4 SNVS_TAMPER_OUT0 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 25 of 52...
ENET0_QOS_RG ENET0_RGMII_RX_C I CMOS Receive data valid port A _RX_DV(_ER) MII_RX_CTL TL/C33 ETH_A_(R)(G)MII ENET0_QOS_RG ENET0_RGMII_RXC/ I/O CMOS Receive clock port A _RX_CLK MII_RXC ETH_MDIO ENET_QOS_MDIO ENET0_MDIO/E35 I/O CMOS Management data REL0.1 iWave Systems Technologies Pvt. Ltd. Page 26 of 52...
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ETH_B_(R)(G)MII_R ENET1_RGMII_RX ENET1_RGMII_RXC/ I/O CMOS Receive clock port B X_CLK Note: On-OSM series termination resistors for ENET0_TX & ENET1_TX is not provided. Kindly provide the same in the Carrier Board. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 27 of 52...
USB 2.0 Port1 Over Current USB_SS3_TC3) 10K PU Indicator. AB20 USB_B_VBUS OTG2_VBUS USB_OTG2_VBU I USB VBUS 5V USB Port1 power detection. S/G13 AC20 USB_B_EN USB_OTG2_PW USB_SS3_TC1/G O, 3.3V CMOS USB Power Enable. R(USB_SS3_TC1 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 28 of 52...
I2S, AC97 and other audio CODEC/DSP interfaces. The SAI general features are including Transmitter section with independent REL0.1 iWave Systems Technologies Pvt. Ltd. Page 29 of 52...
LGA balls whereas UART2 is optionally connected to the LGA. UART3 can be used for any data communication. UART0 of the SoC is connected to LGA and used as Debug UART. For more details on UART pinouts, refer below table: REL0.1 iWave Systems Technologies Pvt. Ltd. Page 30 of 52...
Pin Number AC17 CAN_A_TX FLEXCAN1_TX(UART2_TX UART2_TX/AP O, 1.8V CAN 1 Transmitter. CMOS AB17 CAN_A_RX FLEXCAN1_RX(UART2_RX UART2_RX/AN I, 1.8V CAN 1 Receiver. CMOS AC19 CAN_B_TX FLEXCAN2_TX FLEXCAN2_TX O, 1.8V CAN 2 Transmitter. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 31 of 52...
ADC_IN1/AE35 O, 3.3V RGB_R1 DC_IN1)_3V3 CMOS Red data bit 1 ADMA_LCDIF_D14_R2(A ADC_IN0/AD3 O, 3.3V RGB_R2 DC_IN0)_3V3 CMOS Red data bit 2 ADMA_LCDIF_D15_R3(A ADC_IN3/AF34 O, 3.3V RGB_R3 DC_IN3)_3V3 CMOS Red data bit 3 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 32 of 52...
For more details on Power & GND Signals pinouts on OSM PCB Ball, refer the below table. SoC Ball OSM Pin OSM Signal Signal Type/ Pin No. Name/ Description Name Name Termination Pin Number Y8, Y9, Y10, Y11, Y17 VCC_IN_5V VCC_IN_5V I, 5V Power Supply Voltage. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 35 of 52...
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POWER voltage test point D18,E15,E21,F16,F2 Power Ground. 0,J16,J20,L18,M16, M20,P18,R16,R20,V 16,V20,Y18,AA14,A A17,AA19,AA22,AB1 5,AB21,A4,A7,A10,B 2,B5,B8,B9,C11,D1,D 5,D8,E2,H2,H4,L2,L4, P2,P4,R1,U2,U4,V1, W3,Y2,AA1,AA4,AA 7,AA8,AA10,AA11,A B3,AB6,AB9,AC4,AC 7,AC10 VDD_RTC VDD_RTC I, 3V Power 3V coin cell input for RTC. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 36 of 52...
USB VBUS power for detection. Power Ground UART0_RX O, 1.8V CMOS Debug UART Receiver. UART0_TX I, 1.8V CMOS Debug UART Transmitter. Power Ground Power Ground BOOT_MODE0 SCU_BOOT_M I OD CMOS ,1.8V/4.7K PU ODE0/AR23 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 37 of 52...
This table has been prepared by referring NXP’s i.MX 8XLite Hardware User’s Manual. Important Note: It is strongly recommended to use the pin function same as selected in the OSM LGA for iWave’s BSP reusability and to have compatible OSM modules in future for upgradability.
¹ i.MX 8XLite OSM LGA Module is designed to work with VCC_IN_5V input power rail from OSM. i.MX 8XLite OSM LGA Module use this voltage as backup power source when VCC_IN_5V is OFF. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 45 of 52...
0.055/0.275 RTC power when no VCC_IN_5V supply is provided VRTC_3V0 0.0000004/0.0000012 ¹ Power consumption measurements have been done in iWave’s i.MX 8XLite based Pico ITX SBC with iWave‘s iW- PRGWZ-SC-01-R2.0-REL1.0-Linux5.15.52 BSP. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 46 of 52...
SoC. Note: iWave supports Heat Sink Solution for i.MX 8XLite OSM LGA Module. For more information on Heat Sink contact iWave support team. Do not Power On the SOM without a proper thermal solution.
3.2.4 Electrostatic Discharge iWave’s i.MX 8XLite OSM LGA Module is sensitive to electro static discharge and so high voltages caused by static electricity could damage some of the devices on board. It is packed with necessary protection while shipping. Do not open or use the SOM except at an electrostatic free workstation.
The i.MX 8XLite OSM LGA Module PCB thickness is 1.2mm±0.1mm, top side maximum height component is 1.87mm (Programming Header). In bottom side maximum height component is Voltage Level Translator (1mm). Please refer the above figure which gives height details of the i.MX 8XLite OSM LGA Module. REL0.1 iWave Systems Technologies Pvt. Ltd. Page 49 of 52...
The below table provides the standard orderable part numbers for different i.MX 8XLite OSM LGA Module variants. Please contact iWave for orderable part number of higher RAM memory size or Flash memory size SOM configurations. Also, if the desired part number is not listed in below table or if any custom configuration part number is required, please contact iWave.
8XLite Pico ITX SBC iWave Systems supports iW-RainboW-G46S-i.MX 8XLite Pico ITX SBC which is targeted for quick validation of i.MX 8XLite SoC based OSM and its features. Being a Pico-ITX form factor with 100mm x 72mm size, the SBC is highly packed with all necessary interfaces &...
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8XLite OSM-Size SE LGA Module Hardware User Guide REL0.1 iWave Systems Technologies Pvt. Ltd. Page 52 of 52...
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