IBM 2025 Maintenance Manual page 8

Processing unit
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H/stop
HW
Hz
IE
IC
ICC
I-cycle
IF
I-fetch
IL
ILC
incr
info
inh
insn
int
intch
intv
intvn
inv
I/O
IPL
IR
ISA
I-time
KB
kva
LCW
LO
log
LS
1th
LUA
mA
Man
MAP
MAS
max
MC
MDM
MFCM
MHz
min
MMSK
mped
mplr
Mplx
mply
npx
MS
IPS
N
neg
no
No-Op
nonn
ns
OE
oflo
O/L
op
oi;:nd
viii
hard step
hardware Cf unne
1)
Hertz (cycles per second)
interruµ. .tuffer
instruction counter
interface control check
instruction cycle
interface
instruction fetch
incorrect
lengL~
instruction length code
increment
inf orrr-ation
inhibit
instruction
interrupt
interchange
interval
intervention
invert
input/output
initial program loading
interrupt request
invalid storage address
instruction time
keyboard
kilovolt ampere
line control word
lcw
logical
local storage
latch
load unit address (switches)
milliamperes
rr:anual
maintenance analysis procedure
microprogram automation system
maximum
irachine check
Maintenance Diagrams Manual
Multi-Function Card
~achine
n;egacycle
minimum
Trap (Mask) Priority Register
multiplicand
multii:_:lier
multiplexer
rr:ultii;:ly
multiplexer
ma in storage
millisecond
inverter (logic block)
negative
nuxrber
no operation
normalize
nanosecond
exclusive OR <logic block)
overflow
overload
C
console)
operation
operand
OR
OS
osc
p
PC
Pch
PCI
PFR
PG
PIW
PLB
pos
poss
pr gm
pr gm chk
pri
pr iv
PR-KB
prot
Prt
PS
PS.A
PSW
pt
pty
Pwr
PZR
QB
quot
RC
Rdr
re comp
reg
req
reqd
res
rgen
rmdr
rms
RPQ
RR
RS
Rst
rt
Rtn
R-W
s
SAR
SC
SC
SCR
SCT
SCh
SDR
SDSD
sel
seq
serv
sgnf
SI
SL
SLD
SLI
OR circuit <logic)
operating system
oscillator (logic)
parity bit
parity check
punch
program controlled interrupt
punch feed read
parity generation
priority interrupt wait
print line buffer
positive
possible
program
program check
priority
privileged
printer-keyboard
protection
printer
power supply (number)
protected storage address
program status word
point
parity
power
possible zero remainder
quotient bit
quotient
read clock
reader
re complement
register
request
required
reset
regenerate
remainder
root mean square
request for price quotation
register-to-register operation
register-to-storage operation
reset
right
return, routine
read-write
sign bit
storage address register
shift counter
scratch (register)
silicon controlled rectifier
system configuration table
subchannel
storage data register
single disk storage drive
select
sequence
service
significance, significant
storage immediate operation
shift left
simplified logic diagram
suppress incorrect length
indication

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