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phase, at a maximum of 15 amperes for the
CPU.
For World Trade, two convenience
outlets provide 200. 220, or 235 vol ts at 8
amperes for the CPU.
Integrated units can
draw up to 8 amperes per unit.
The
convenience outlets for the CPU and the
integrated attachments cannot exceed a
total of 15 amperes .•
5 .4 .. 2 BLOWERS
The CPU has three blowers in the power
supply tower, three blowers per SLT gate,
and three blowers in each M2-I unit.
These
blowers require 208 or 230 volts., 60 hertz,
or 220 volts at 50 hertz, single phase.
5.5 DC OUTPUTS
The power system of the 2025 supplies de
outputs
as
shown in Figure 5-1.
All de voltages must be within the
tolerances indicated in Figure 5-1
(excluding transient noise) at any card
socket in the CPU.
'Iheref ore, each power
supply must maintain its output voltage in
accordance with its individual performance
specification.
The distribution tolerance
must not exceed ±23 within the CPU and
devices with reference established at the
point of the external entry into the
devi.ce.
Supply Rating Maximum Current
Power
Su~ly
Tolerance
Setting
Permitted (Avg.)
Location
o. at Circuits
±0.5%
+12V 13A
11. 7 A
8
±4%
12.24
-12V 13A
13.0 A
3
12.24
- 3V 30A
30.0 A
6
3.01
- 6V
4A
4-0 A
1
6.24
+ 3V 45A
42.0 A
2
3.12
-30V 8A
8.0 A
12
(Per Mem Spec)
(9.0A at 34.5 V)
***+ 6V 40A
47.0 A
10
±4%
6.02
+60V 20A
20.0 A
14
±10%
N/A
+ 6V 16A
15.5 A
11
+4%
-7%
6.02
-30V 2A
2.0 A
4
±4%
36.72
-20V 4A
4.0 A
Developed
±10%
N/A
from T1
+24V 4.2A
4.2 A
Developed
±15%
N/A
from T3
+48V 3A
3.0 A
Developed
±10%
N/A
from T1
+ 6V 32A
30.0 A
5
±4%
6.24
+ 3V 50A
50.0 A
9
±4%
3.01
+20V 1.0A
1.0 A
Developed
±10%
N/A
from T7
5.5.1 MARGINAL CHECKING JACK RECEPTACLE
(p1)
A jack receptacle (P1) located on the 2025
relay panel provides +12 volts for marginal
checking the 2540 Clogic YA 241).
5. 6 POWER ON/OFF SEQUENCING
See timing power supply logic YA 031.
5 .• 6.1 POWER ON/OFF OF CPU AND. INTEGRATED
I/O UNITS
5.6.1.1 +6, -3, +3, and -30 Voltages
The +6, -3, and +3 voltages must be within
a sensed percentage of their rated level
prior to bringing up the -30 volts used by
storage.
'Ihe -30 volt supply must be down
to or below a sensed level before removing
+6, +3, or -3.
Whenever the +6 volt supply
is between +5 .4 vol ts and +2
.o
volts for
more than 100 ms, -30 volts should be
dropped to less than -10 volts.
Any loss
of the +6 volts should result in the
removal of -30 volts from the BSM (basic
storage modules).
5. 6.1. 2 + 6, +3, - 3, and +60 Vol taqes
The +6., +3, -3, and +60 volts direct must
be up within a sensed percentage of their
rated level prior to applying the +60 volts
Position
Feature
PS-TB1-2, TBH> Basic
PS-TB 1-2, TB1-5 Basic
*A-LBA1
Basic
PS-TB1-5, TB1-2 1403, 2540
PS-TB1-2, TB1-5 2560, Comm
**M21LB
Basic
*A-LBA1
Basic
N/A
1403
TB25-15, 13
1403
PS-TB1-2, TB1-5 2311
N/A
Basic
N/A
Basic
N/A
Basic
PS-TB1-2, TB1-5 2560, Comm
*A-LBA 1
Basic
N/A
2560
*See logic page YA251
**See logic page YA271
*** +6V@ 50A on machines with EC133539
Figure 5-1. DC outputs
5-2
( 7 /69)
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