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View of B side of Array (Plugs into Bl Board)
Diode
X Return Card
Diode Board l
Board 2
B
D
B
D
8-16K
0-SK
The Logics will call a sense line:
P2
J2
-SA IN 0-Bits 0-SK A.
+SA IN 0-Bits 0-SK A.
The sense amp gate will define the
NOTE:
block, i.e. Al or A2. In this case
In practice the sense/
it is A2. Refer to ALD MM632.
inhibit triple-twist lines
G
J
G
J
from the array are routed
between the diode board
at the top of the array to
Byte l
~
edge connectors in Bl
Note:
Board
The measurements expected when probing
P2
J2
at the SL T Board Connectors for open X or
B2
Y windings or diodes are as follows:
Forward
~
Bias
3.6KQ approx.
B
D
PO
0
PO
10
B
D
Reverse
Bl
1
Bias
100 K Q or greater
DC resistance is measured with the decode
P4
J4
driver cards for the suspect line unplugged.
Byte 0
~
Measurements taken using Simpson (260)
meter on
x
l ohms range.
Inhibit Bl J4 D02 MD702
Sense Bl J4 B02 MD5 l 2
Inhibit
Bl J4 B03
8-l6K Al bit PO
0-SK Al Bit 0
0-8K Al bit I
Figure 1-132.
~ain
Storage Array Line Measurements
1-134
(7/69)
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