Interface Control Check; 1052Logout; Cpu Hardware Checks; Cpu Microprogram Checks - IBM 2025 Maintenance Manual

Processing unit
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1.17 .• 1. 2 Interface Control Check
When an interface control check is detected
en either the multiplexer or selector
channel, the following inforrration is
stared in program-storage locations 80-87
Chex).
80
Trap priority register
(~MSK)
81
Branch conditions register (BA)
82
Channel branch condi ti ens register
(GS)
83
Error count*
84
Channel tranch conditions register (GT)
85
Channel diagnostic register (GD)
86
code byte
Burst Channel
OlXYYYYZ
X=l if time out
Z=l if status trap or chained to
ccw.
YYYYY=time out counter bits
Byte Channel
OOlX~~~Z
X&Z=same as turst channel
M=Misc.
use
87
Device address
*Eits 1-2 of l:yte 83 contain the logout
code:
00 for machine check or channel
central check, or 11 for interface control
check.
1.17.1.3 1052 Logout
The 1052 logout is a microprogram-supported
function that prints out inforrration
ccntained in the diagnostic logout area of
program storage.
(locations 80-87,
hexadecimal).
Existing problem programs
are not affected
by
this logout Frovided
they do not use this area.
The format and
contents of the diagnostic logout area are
rr:achine dependent.
A versicn of SEREP that
acts on this information is available for
use on the Model 25.
In general, the function of such
rracroprcgrams is provided l:y the 1052
logout
microprograrr:~
Subsequent tc
execution of the 1052 logout microprogram,
a System/360 machine-check or I/O interrupt
is initiated.
Existing restart procedures
and prol:lem programs that
do
not act
directly on the diagnostic logout area
(such as BPS, DOS, OBR/SDR, etc.)
are
applicable to the Model 25 within the
lirr:its of storage size.
The Frogram-storage l:yte locaticns and
contents of the diagnostic scanout area are
given in section 1.11 .• 1.1.
1-116
(7/69)
1.17.2 CPU HARDWARE CHECKS
The setting of the check control switch
determines the action taken when a CPU
hardware check occurs <see section 1.18).
Checking is provided at the following
points; an indicator for the conditions is
located on the systerr central panel:
1.
A-Register Parity Check
B-Register Parity Check
These checks are not always activated
l:ecause some external registers are set
and reset by bit and do not carry
parity.
In the case cf a byte gated to
A or B without parity, the check is
disabled.
Local-storage data is always
checked.
2.
Storage Address Parity Check
A parity check is made on all addresses
used to access rrain storage except on
the address after a Branch on Mask
word.
3.
Storage Data Bus-Out Parity Check
This check is made on all data
requested f rorr storage.
A control-word
check occurs on all rrachine cycles
except during the second cycle of a
storage word.
A storage data check may
occur during the second cycle of a
storage contrcl word.
4.
ALU Check
Parallel logic is used in the ALU to
detect an error between the A and B
parity checks and the ALU output.
Each bit position of ALU (including
+6 circuit, complementer and decimal
corrector) has two outputs.
one output
goes to the local store assembler and
the systerr: rrask register; this output
is displayed l:y the indicators.
The
other output goes to the Z=O test.
Both outputs go to the Farity generator
and the ALU check (2-wire check)
circuit.
5.
Storage Protect Check
This is a parity check on the data out
of the storage-protect buffer CSTPl).
1.17.3 CPU MICROPROGRAM CHECKS
There are some cases during machine
operation when a hardware failure that is
not detected by hardware checks could
occur..
In these cases, the microprogram
can reach a state from which it must not
continue:
the microprogram branches to a
stop word.
'!he listings will describe the
reason for reaching the stop word.
Stop words in Model 25 mode are limited
to the system reset diagnostic (BDIA), IPL

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