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Principles of Operation
Table 3-1. LANIC Resets and their Effects
AFFECTED
INIT
FUNCTION
PON
HARDRST
IOCl
SOFTRST
MAUPOWER
OFF
OFF
OFF
OFF
SElFTEST
YES
YES
NO
NO
VISIND
ON
ON
ON
---
MHSEN
OFF
OFF
OFF
OFF
SlVHS
RESET
---
---
---
MASTER HIs
RESET
RESET
RESET
RESET
CRFUlL
0
0
0
---
MASKF
0
0
0
---
SINTRO
0
0
0
---
SINTR1
0
0
0
---
Z-80 RESET
PULSE
PULSE
lATCH
NO
POWER -ON RESET. The PON signal on the backplane causes a power-on reset. The entire hardware
and firmware state of LANIC is initialized and all LANIC operations on the backplane cease. When the
PON goes active, the LANIC enters the SELFTEST state.
HARD RESET. Hard reset aborts all operations in progress on the LANIC, resets all control registers, and
forces the LANIC into the SELFTEST state. Self-test is then performed and the internal status of the
firmware prior to the reset is unrecoverable. LANIC commands (except further hard resets) must not be
issued until the self -test sequence has completed. At the end of the self-test sequence, the LANIC will go
to the KERNEL state, waiting for COffinlands from the host.
Hard reset is started by the backplane commands PON, SRST, IOCL, INIT, WREG 14, WREG 15, and by
activating the self-test switch.
The HARDRST clears the channel interrupt mask flip-flop MASKF, clears both SINTRO and SINTR
1
interrupt requests, and illuminates the VISIND visual indicators (LEDs). In addition, the master
handshake enable flip-flop, MHSEN, is cleared.
SOFT RESET. Soft reset suspends all hardware operations in progress and puts the LANIC into the
KERNEL state, waiting for further commands. In this way, most of the LANIC's internal state
information is preserved. The microprocessor is not reset and information pertaining to the RQ entries
remains valid. The firmware is forced to the KERNEL state and communication with the host software is
restricted to the CR and SR only.
The soft reset is typically issued when a LANIC failure has been detected by the host (e. g., LANIC is
unresponsive). The firmware is thus forced to communicate with the host software. Since self-test has
not been performed, diagnostics of the firmware can take place by issuing the MEMORY_DUMP
command.
Feb 85
3-9
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