HP 30242 Installation And Service Manual page 37

Principles of Operation
The AUI cable has a IS-pin D-type connector on each end for connecting the LANIC to the MAU. The
pin connections for the AUI cable are presented in Section 2.
A block diagram of the AUI interface circuitry is shown in figure 3- 2. The AUI interface consists of
four blocks:
• A type 8023 chip
• Level 1 circuitry
• MAU power control
• AUI activity trace LEDs
TO PROTOCOL
CONTROLLER
MAU POWER SWITCHED 12 VOLT
CONTROL
..........
/ '
. /
............
LEVEL 1
............
"' / '
. /
. /
............
802.1
"-
/
-0
AUI ACTIVITY
. /
TRACE LEOs "'
}
TO
AUI
CABLE
Figure 3-2. AUI Interface Block Diagram
The 8023 chip performs the following functions:
Decodes receive clock
Decodes receive data
Generates transmit clock
Encodes transmit data with clock
Decodes CONTROL IN
Detects carrier present
Loops transmit data to receive data for diagnostics
The AUI side of the 8023 chip consists of two balanced receivers (DATASIN + CONTROL SIN) and one
balanced driver (DATASOUT). The signals from these circuits are put through a passive balancing
network and are then transformer coupled to the AUI pairs.
Feb 8S
3-11