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Principles of Operation
LANIC MPU and Firmware.
Local intelligent control is provided by a microprocessor (MPU) and firmware on the LANIC card. An
8-bit microprocessor of type Z- 80B handles all the LANIC-to- host communication and performs many
link-level operations independently of the host. The MPU also is responsible for performing an on-board
self-test to detect and locate hardware faults. The firmware for the MPU resides in both ROM and
RAM. The ROM firmware contains the self-test, MPU interrupt control, and bootstrap programs. The
link -level operational firmware is downloaded into LANIC RAM from system memory.
Local Communications Controller.
The Local Communications Controller (LCC) is a high -performance LSI device that performs most of the
data link and physical link functions for the local network architecture. The LCC performs high-speed
serial operations, packet address checking, network contention control, packet formatting, and CRC
(Cyclic Redundancy Check) generation/checking. The LCC is controlled by the MPU through local
memory.
Direct Memory Access.
The LANIC can transfer data directly to and from system memory. Once the host has given the LANIC
the location of data buffers in system memory, data is transferred without host intervention. This allows
maximum system performance by uploading the task of packet transmission and reception from the host,
allowing the host to spend more of its time on other processing.
Firmware Download and Configuration
Although the self -test, diagnostic, and bootstrap firmware are all resident in ROM, the operational
firmware must be downloaded from the host into the LANIC local memory.
After the firmware is
downloaded, control is passed to it and the LANIC is ready to be configured. Configuration comprises the
82586 chip configuration, setting the station address, and initializing the command response queues.
FIRMWARE DOWNLOAD. The host initiates the downloading of firmware from system memory to the
LANIC local RAM. The LANIC performs the actual transfer via its DMA facility. After the transfer,
the LANIC computes the checksum of the data in local RAM and compares it with the checksum
computed by the host. This ensures that the download firmware is transferred correctly. The entire
firmware may be downloaded via a sequence of download operations. The host has full control of
firmware operation and can suspend firmware execution at any time and dump LANIC memory and
hardware status to system memory.
SETTING STATION ADDRESS. The LANIC supports both globally and locally administered addressing.
Globally administered addressing is supported by a ROM on the LANIC that contains a unique 48-bit
address code. This address can be read by the host. Setting the station address is accomplished by a
process involving the Duplicate Address Check (DAC) protocol. The host supplies the LANIC with a
candidate station address. The LANIC sends an Exchange Identification (XID) packet with this address in
the destination field. If any node is using the same station address, it sends the packet back to the
LANIC. The LANIC waits for any response to come back before establishing its station address. If the
DAC protocol fails, the host is notified to take further action.
Feb 85
3-3
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