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PROCESSOR TECHNOLOGY CORPORATION
8KRA STATIC READ/WRITE MEMORY MODULE
APPENDIX V
*G2 - G2A 4 G2B
H - high level, L - low level. X » irrelevant
r* E
74LS138
SELECT <
ME
L
ce
G2
a
|T
positive logic: see function table
ENABLED G2B|T
^G1 [T
OUTPUT
Y7 [~7~
SND |~S~
INPUTS
ENABLE
SELECT
OUTPUTS
G1
G2*
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
H
XXX
H
H
H
H
H
d
H
H
L
X
XXX
H
H
H
H
H
d
H
H
H
L
L
L
L
L
H
H
H
H
d
H
H
H
L
L
L
H
H
L
H
H
H
1 d
H
H
H
L
L
H
L
H
H
L
H
H
1 d
H
H
H
L
L
H
H
H
H
H
L
H
d
H
H
H
L
H
L
L
H
H
H
H
L
d
H
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
L
H
H
L
H
H
H
H
H
d
L
H
H
L
H
H
H
H
H
H
H
H
d
H
L
' Output 5 6 only
"Output i 4 only
X - Irtalevani
DISABLE
DIS«
INPUT
DIS,
INPUT
OUTPUT
0
0
0
1
0
0
1
0
X
1
X
H i*
1
X
X
H r"
91LO2A or21LO2B
16
2
14
3
13
4
OUT
5
12
6
7
10
8
9
15
PIN NAMES
D
in
DATA INPUT
A
q
- Ag
ADDRESS INPUTS
R/W
READ/WRITE INPUT
LM340T-5.0 or 7805UC
91LO2A or 21LO2B
BLOCK DIAGRAM
AV-2
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