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PROCESSOR TECHNOLOGY CORPORATION
8KRA STATIC READ/WRITE MEMORY MODULE
SECTION IV
4.1
GENERAL DESCRIPTION
Refer to the 8KRA schematic in Section V of this manual.
Address lines A0 through A9 are buffered from the bus through
IC77 and IC78 to the ten address input pins on each RAM (random ac
cess memory) chip, IC1 through IC64.
The memory matrix consists of
eight, 1024-word "pages".
Only one page at a time, however, is se
lected to read information to, or write information from, the data
buses.
In a memory write operation, the 8KRA writes data from the
data-out bus, DO0 through D07 .
Each data-out line is buffered (IC78
and IC79) to the DI (data-in) input of one RAM chip in each page of
memory.
Thus, each RAM chip in a page stores one bit of the word in
that page.
In the memory read mode, the 8KRA reads information to the
data-in bus, DI0 through DI7 .
The DO (data-out) outputs of the RAM
chips are tri-state types that float in a high-impedance state when
they are not selected.
They can therefore be — and are — connected in
parallel from one page to the next.
As a result, only the bits in
the selected page can be gated by IC69 and IC76 to DI0 through DI7.
Full addressing of the 8KRA is done on A0 through A15, with
each of the following segments performing the indicated function:
ADDRESS BITS
FUNCTION
A0 - A4
A5 - A9
A10 - Al 2
Al 3 - A15
Selects row inside RAM chips (one of 32)
Selects column inside RAM chips (One of 32)
Selects memory page (one of eight)
Selects 8KRA module (one of eight)
4.2
READ OPERATION
Data from the selected memory page is applied to tri-state
bus drivers, IC69 and IC76.
The drivers are enabled only if the
output on pin 6 of 1072 is low.
This only occurs when all four in
puts are high.
Pin 6 of IC72 is low when:
1) SMEMR and PDBIN are high and
2) the wire OR'ed output of comparator 1070 (pins 3, 6, 8 and 11)
is high.
The first condition occurs when the data bus is to be
used for memory read data and the data bus is in the input mode.
The second condition occurs when the 8KRA is specifically address
ed and LOUT and SINP are low.
IC68 and IC71 are 4-bit binary adders/subtractors .
IC68
adds the complement (set by the Offset Switches) of the A10 through
IV-1
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